09-25-2017 11:46 PM
when i use hardware manager to generate a mcs file from one bitstream file , it can programme into flash successly.
but when i generate a mcs file from two bitstream files, it reports error after programming into flash.
i use vivado 2016.4, XC7a75T, 28F128P30T flash.
INFO: [Xicom 50-105] The verify operation will only be performed on the address range specified by the Memory Configuration File (MCS).
Mfg ID : 89 Memory Type : 8818 Memory Capacity : 0 Device ID 1 : 0 Device ID 2 : 0
Performing Erase Operation...
Erase Operation successful.
Performing Program and Verify Operations...
Program/Verify Operation failed.
Byte 2097184 does not match (00 != 65)
ERROR: [Labtools 27-3144] Invalid option: Byte 2097184 does not match (00 != 65)
program_hw_cfgmem: Time (s): cpu = 00:00:07 ; elapsed = 00:01:16 . Memory (MB): peak = 811.031 ; gain = 0.000
ERROR: [Common 17-39] 'program_hw_cfgmem' failed due to earlier errors.
09-26-2017 12:02 AM
09-26-2017 12:02 AM
09-26-2017 12:11 AM
hi, balkris ,thanks for you reply.
Does you means this, choose the "entire configration Memory Device "
Performing Erase Operation...
Erase Operation successful.
Performing Program and Verify Operations...
Program/Verify Operation failed.
09-26-2017 12:29 AM
i have tried the erase and blank check, it stil failed.
INFO: [Xicom 50-105] The verify operation will only be performed on the address range specified by the Memory Configuration File (MCS). Mfg ID : 89 Memory Type : 8818 Memory Capacity : 0 Device ID 1 : 0 Device ID 2 : 0 Performing Erase Operation... Erase Operation successful. Performing Blank Check Operation... Blank Check Operation successful. The part is blank. Performing Program and Verify Operations... Program/Verify Operation failed. Byte 2097184 does not match (00 != 65) ERROR: [Labtools 27-3144] Invalid option: Byte 2097184 does not match (00 != 65) program_hw_cfgmem: Time (s): cpu = 00:00:07 ; elapsed = 00:03:52 . Memory (MB): peak = 811.031 ; gain = 0.000 ERROR: [Common 17-39] 'program_hw_cfgmem' failed due to earlier errors.
09-26-2017 07:22 PM
no progress.......
09-27-2017 07:41 PM
sloved, i mistaked the RS0/RS1 control.
07-20-2020 11:57 PM
我和题主存在一样问题,我在生成mcs文件时 首地址 00 01 02 03 结果为00 02 04 06,,我的RS管脚是25-24,最后烧写到FPGA时出现了和题主一样的问题,题主所谓的RS控制错误具体指??有劳题主解答