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Afss
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Registered: ‎02-02-2021

what is the meaning of Maximum I/Os in SP 601 LX16 CSG324 package

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what is the meaning of Maximum I/Os in SP601 LX16 CSG324 package

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joancab
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Registered: ‎05-11-2015

The "maximum I/Os" you find in the chip datasheet is the number of pins that can be used as I/Os.

In a development board, not all I/Os may be connected to something and some of them are used to interface peripherals like Ethernet or USB, so if by "I/O" in a development board you understand the protocol-less pins in a pin header or PMOD, obviously there are less.

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bruce_karaffa
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Registered: ‎06-21-2017

There are only so many pins (balls) on the device that you can route signals to or from.  Some pins are dedicated for power and configuration.  The rest may be used for user IO.

drjohnsmith
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Registered: ‎07-09-2009

Can you share a reference to where your looking please

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Afss
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Registered: ‎02-02-2021

Please see the attachment

InpOut.png
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Afss
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Registered: ‎02-02-2021

Hi

So in SP601 user guide, the maximum I/Os given as 232. 

But in SP601 evaluation board i cant see this much of pins to feed and take the signals from the board

InpOut.png
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joancab
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Registered: ‎05-11-2015

The "maximum I/Os" you find in the chip datasheet is the number of pins that can be used as I/Os.

In a development board, not all I/Os may be connected to something and some of them are used to interface peripherals like Ethernet or USB, so if by "I/O" in a development board you understand the protocol-less pins in a pin header or PMOD, obviously there are less.

View solution in original post

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Afss
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Registered: ‎02-02-2021

Now it is clear.

But which term is used in the user guide to identify the actual number of pins for ADC and DAC?

(Device SP601 Spartan 6 LX16)

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joancab
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Registered: ‎05-11-2015

I don't think they use a specific term for these pins connected to peripherals. All development boards have their schematic available so you can count how many connections.

Afss
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Registered: ‎02-02-2021

Thank you for clarifying my doubts

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