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Registered: ‎02-03-2019

AXI - UART 16550

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Hai,I am doing AXI-UART 16550 RTL code,I read overall spec but the flow i am not getting Please anybody help me How to analyze.

  Thanks in advance

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Registered: ‎05-21-2015

shivunp8@gmail.com,

I'm not sure I follow, are you building your own UART 16550 core or using someone else's?

There is a (somewhat) broken UART 16550 design on Open Cores, a discussion on how to formally verify UART designs in this tutorial, and another one on how to build a formally verified AXI-lite interface here.

Is this what you are looking for?

Dan

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Scholar
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Registered: ‎05-21-2015

shivunp8@gmail.com,

I'm not sure I follow, are you building your own UART 16550 core or using someone else's?

There is a (somewhat) broken UART 16550 design on Open Cores, a discussion on how to formally verify UART designs in this tutorial, and another one on how to build a formally verified AXI-lite interface here.

Is this what you are looking for?

Dan

View solution in original post

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