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mattwaltz
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Registered: ‎06-05-2017

AXI VDMA Configuration

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Hello,

I have an AXI VDMA and an AXI4-Stream to Video Out IP blocks in my design. Currently the AX4-Stream to Video out requests 4 pixels per clock, so the VDMA has an AXI data width of 96 (24 * 4). I am a little confused as to what I should program in for the following values when setting up the VDMA engine from software, assuming a resolution of 1920x1080.

HoriSizeInput = <?>;

Stride = <?>;

Any help would be much appreciated.

 

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josephsamson
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Registered: ‎10-05-2010

The horizontal size is the number of bytes per image line. Your pixel is 3 bytes and there are 1920 pixels per line, so HSIZE is 3 * 1920 or 5760.

The stride must be at least the size of HSIZE.

 

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Joe Samson

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josephsamson
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The horizontal size is the number of bytes per image line. Your pixel is 3 bytes and there are 1920 pixels per line, so HSIZE is 3 * 1920 or 5760.

The stride must be at least the size of HSIZE.

 

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Joe Samson

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mattwaltz
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Registered: ‎06-05-2017

Ah, so even though the MM2S AXI width is 96, it still just expects bytes per line? That's good to know, thank you.

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florentw
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Registered: ‎11-09-2015

Hi @mattwaltz,

Yes as per @josephsamson's reply, the VDMA only care about byte. Thus you define your HSIZE, VSIZE and STRIDE in number of bytes. Note that if you are you might have padding to be byte aligned.

For STRIDE, I recommend you to use the same number as HSIZE for the beginning.

If everything is clear for you, could you close the topic by marking @josephsamson's reply as accepted solution (click on accept as solution button while logged in). Also do not hesitate to give him kudos with the like button to thanks him for the reply.

Best Regards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**