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girishs12
Visitor
Visitor
8,487 Views
Registered: ‎09-19-2009

Building a SRAM in FPGA and interfacing it to microcontroller boards

I have written a code for  SRAM using VHDl, i want to interface it with micro controller boards(like 8051) for which my FPGA is an external memory.

What are steps to be followed,i e the intefacing logic etc.I use a spartan 3 board.

 

 

I also want to know whether there is a difference in speed when a ram is built on an fpga and a ram chip that is directly connected to an micro_controller??

so that i can justify that my ram on fpga is faster than usual rams.

 

Message Edited by girishs12 on 10-06-2009 08:49 AM
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eilert
Teacher
Teacher
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Registered: ‎08-14-2007

Hi,

using a FPGA solely as memory device for a microcontroller is a shameful waste of ressources.

If the FPGA is big enough to offer you sufficient memory ressources (BlockRAM) you can probably put the whole microcontroller and all of his I/O engines (like UART etc.) in the FPGA.

 

If it's just a first step to a more complex SoC with an external microcontroller, there's good news for you.

Unless the devices use compatible I/O-levels (e.g. CMOS 3.3V) you can connect your MC directly to the FPGA. All of the interfacing logic can be realized inside the FPGA

(such as Adress decoding, MSB-Adress Latch etc. You only have to make sure that you are using the same clock signal for MC and FPGA.

 

Have a nice synthesis

  Eilert

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shantanu75
Explorer
Explorer
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Registered: ‎04-06-2009

As stated by Eilert, you can implement your microcontroller inside your FPGA and it is a more better way. Also 8051 core also avialable - for Actel I know it is. And I am sure if you do little bit of Googling you can find one also for Xilinx - you may have to pay for it. But you are having your own design and obviously you are having different logic behind that, which may be little bit imposible for us to understand from outer world.

 

Now coming to your question -

 

Raw method - There are lots of example codes RAM and ROM avialable in net. Also avialable in Standard Books.

 

Better Approach - Use of Block RAM

8051 use Async Mem where as Block RAM are Sync Mem. So you need F/F to latch the Data and Address using control signals generated by 8051. Use a clock to interface the F/F to Block RAM and prefer to select the Clock twice the clock speed what you are using in 8051. For Good Clock you need to use the DCM.

 

In the Userguide Block RAM and DCM are well explained.

Shantanu Sarkar
http://www.linkedin.com/pub/shantanu-sarkar/0/33a/335
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shantanu75
Explorer
Explorer
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Registered: ‎04-06-2009

Approx 3 yr back I have worked in the development of two Atmel 8051 based Products and in both the case 8051 use to work on 5V. I am not sure if there is any 8051, which works on 3.3V.

 

If avialable, better option is to use an 8051 which is 3.3V compatible and also according to Bassman59 it is avialable. If in your case if your 8051 is working on 5V then you must need Level Translator  in between FPGA and 8051.

Message Edited by shantanu75 on 09-23-2009 10:15 PM
Shantanu Sarkar
http://www.linkedin.com/pub/shantanu-sarkar/0/33a/335
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bassman59
Historian
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Registered: ‎02-25-2008


shantanu75 wrote:

 

. I am not sure if there is any 8051, which works on 3.3V.

 

If in your case if your 8051 is working on 5V then you must need Level Translator  in between FPGA and 8051.


 

Silicon Labs, Atmel, NXP all make 8051 variants that use 3.3V (or lower!) supplies.

 

----------------------------Yes, I do this for a living.
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