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Explorer
Explorer
6,464 Views
Registered: ‎11-24-2013

Buses between FPGAs without microprocessor?

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Hello everyone,

 

when using the IP cores for communication buses, for instance the bus CAN, the user interface is something like this:

 

Capture.PNG

 

The module has in its interior a set of configuration registers, an interruption line... If I had to use such core, I would implement a "decaffeinated" MicroBlaze and use its drivers to handle the communication through the bus with the core.

 

I wanted to ask if this is the most common approach for using this kind of modules for communication buses or if in any case it is recommended to handle them without any microprocessor.

 

Thanks a lot and best regards

Ignacio

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Historian
Historian
10,961 Views
Registered: ‎02-25-2008

@imgignacio wrote:

Hello everyone,

 

when using the IP cores for communication buses, for instance the bus CAN, the user interface is something like this:

 

Capture.PNG

 

The module has in its interior a set of configuration registers, an interruption line... If I had to use such core, I would implement a "decaffeinated" MicroBlaze and use its drivers to handle the communication through the bus with the core.

 

I wanted to ask if this is the most common approach for using this kind of modules for communication buses or if in any case it is recommended to handle them without any microprocessor.

 


The cores are designed to interface to a standard sort of processor bus, but there's no reason why you can't use a state machine or other logic to act as the "processor" side.

----------------------------Yes, I do this for a living.

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Historian
Historian
10,962 Views
Registered: ‎02-25-2008

@imgignacio wrote:

Hello everyone,

 

when using the IP cores for communication buses, for instance the bus CAN, the user interface is something like this:

 

Capture.PNG

 

The module has in its interior a set of configuration registers, an interruption line... If I had to use such core, I would implement a "decaffeinated" MicroBlaze and use its drivers to handle the communication through the bus with the core.

 

I wanted to ask if this is the most common approach for using this kind of modules for communication buses or if in any case it is recommended to handle them without any microprocessor.

 


The cores are designed to interface to a standard sort of processor bus, but there's no reason why you can't use a state machine or other logic to act as the "processor" side.

----------------------------Yes, I do this for a living.

View solution in original post

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Teacher
Teacher
6,433 Views
Registered: ‎03-31-2012
If you are only concerned about configuration, you can just assign some default values to the inputs and set the write enable high so a combinational logic would drive the same configuration (except of course if the IP gets confused by constant write to config space).
If you want full control, as the OP suggests you can always implement a state machine to use the UI portion of the IP.
- Please mark the Answer as "Accept as solution" if information provided is helpful.
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Explorer
Explorer
6,421 Views
Registered: ‎11-24-2013

Ok, thank you both for the information!

 

Regards,

Ignacio.

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