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2,744 Views
Registered: ‎03-18-2014

Cannot find <std_logic_1164> in library <ieee>.

Hi,

when i synthesize my design for vertes series, I'm able to synthesize. But the same design if I do synthesis for Spartan 6 series, I'm getting below errors:

 

Cannot find <std_logic_1164> in library <ieee>. Please ensure that the library was compiled, and that a library and a use clause are present in the VHDL file.
ERROR:HDLCompiler:1084 - "Unknown" Line 0: Registering Dependencies Error: The primary unit 'standard' could not be found during restore
ERROR:HDLCompiler:1051 - "Unknown" Line 0: unisim.vcomponents failed to restore
ERROR:HDLCompiler:104 - "D:\designs\Tri_ETH_MAC\sync_block.vhd" Line 68: Cannot find <vcomponents> in library <unisim>. Please ensure that the library was compiled, and that a library and a use clause are present in the VHDL file.
ERROR:HDLCompiler:104 - "D:\designs\Tri_ETH_MAC\sync_block.vhd" Line 70: Cannot find <standard> in library <std>. Please ensure that the library was compiled, and that a library and a use clause are present in the VHDL file.
ERROR:HDLCompiler:69 - "D:\designs\Tri_ETH_MAC\sync_block.vhd" Line 72: <bit_vector> is not declared.

 

When I re-install Xilinx ISE it starts working for 1 or 2 days. I'm using free versions of Xilinx tool and 30 days evaluation licence key...

 

Please help me in resolving this issue.

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Scholar
Scholar
2,740 Views
Registered: ‎06-05-2013

Hello,

 

Have you declared the library

 

library IEEE;
use IEEE.STD_LOGIC_1164.ALL; at  the beginning of the code?

-Pratham

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