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Explorer
Explorer
3,048 Views
Registered: ‎12-12-2009

Creating Custom Peripheral in Verilog

Hi,

 

I use ISE DS 13.1.

 

Is it possible to create custom peripheral template files in Verilog? As far I know, there is no option for this and template files are generated in VHDL by default. However it is possible to create the user logic part in Verilog.

 

 

Thank you.

abdullah
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Xilinx Employee
Xilinx Employee
3,032 Views
Registered: ‎08-02-2007

Re: Creating Custom Peripheral in Verilog

Hi,

 

This is a known issue and is already reported.

 

http://www.xilinx.com/support/answers/40500.htm

 

Thnx

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