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rudy
Explorer
Explorer
3,483 Views
Registered: ‎04-29-2010

DCM phase shift

Hi,

In my design, I have a dcm instance, and in the ucf file I have something like:

 

INST "U_1/inst_DCM60M"  LOC = "DCM_X2Y1";

 

I wanted to introduce a phase shift to this clock, but I want avoid touching the source file (.vhd) & and possibly the synthesis file (.edf), and I tried to do this in the (.ucf) file, by adding the following:

 

for example, to add a phase offset of 16, in the range of [-255:255], I did the following:

 

INST "U_1/inst_DCM60M" PHASE_SHIFT = 120;
INST "U_1/inst_DCM60M" CLKOUT_PHASE_SHIFT = FIXED;

 

During place and route, I got no error, and everything looked like worked just fine; however, when I took the bit file to the lab, and ran this, I didn't see anything different (compared to zero phase offset).

I even tried bunch of different phase offset values (all ranging between -255 and 255), and non seemed to be introducing any variation to my captured results (of which I was expecting!!!).

I have a feeling, that I am missing something, and that something else needs to be done in addition to what I've included here.

Does anyone have any idea what I might be missing?

Or is this something that cannot be done only during the place and route phase?

And, that it either needs to be done in the source file or in the synthesis phase?

If so, would anyone please tell me how can I do this during synthesis?

But preferably, I would like to do this during place and route.

 

thanks a lot in advance,

--Rudy

 

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3 Replies
gszakacs
Professor
Professor
3,465 Views
Registered: ‎08-14-2007

If  you don't think anything is happening from the .ucf file changes, I would suggest

looking at the design after place & route in the FPGA editor.  Find and open the

DCM and press the "F=" key to look at the settings to see if your .ucf phase shift

settings were applied to the design.  If not, you may need to change it in the

source code instead.

 

It is also possible to change these settings in the FPGA editor if you don't want to

re-run synthesis and place&route.  But when you're happy with the final settings

it's best to update the source code so it stays for the next update.

 

HTH,

Gabor

-- Gabor
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john.h
Explorer
Explorer
3,448 Views
Registered: ‎02-27-2010

To add a phse shift of 16, why not use "PHASE_SHIFT = 16;" ?  Perhaps this is just a typo....

 

You didn't specify your device family.  The Spartan-3E (and perhaps other Spartan 3E/3A derivatives) behave a little differently than the Spartan-3 and Virtex families.  Rather than specifying a phase shift in degrees, it ended up as a phase shift in taps, at least in some CLKOUT_PHASE_SHIFT modes.

 

Read closely on the details of using the DCM in your device specific data sheet.  There may be some differences from what you'd expect given your experience with other Xilinx devices that change how things are implemented.

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rudy
Explorer
Explorer
3,370 Views
Registered: ‎04-29-2010

Thank you all,

I noticed that for the specific design that I was working on a small changes on the DCM phase shift didn't affect much. But when I started to change the phase offset with greater offset values (e.g. 170 or more) then I started to see the effect of phase offset.

 

thanks,

Rudy

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