Does an unmapped logic element generate any side channel signals?
After programming the FPGA, if the area utilisation of my design is smaller than 100% (i.e. Not all logic elements in FPGA are used), will they generate any side channel signals such as power, thermal that have an influence on overall side channel signals?
Or, the non-used logic elements keep on inactive state (i.e. NO in/out pins are connected to VCC)