Enhancement Idea: Using FPGA to speed up synthesis and implementation

[bosskomailchaiye@gmail.com]

Hello everyone,,

Just curious…. Let’s say you have an Alveo or other high capability FPGAs… Couldn’t Xilinx utilize that horsepower to speed up the synthesis and implementation process? Using all those available gates to explore more paths, more optimization, etc...

 This would seem to be a motivation for users to ‘buy’ higher ends cards/dev kits, be a marketing differentiator, and reduce the wait time for users.

 If it were possible, I would certainly be interested in that offering.

[bosskomailchaiye@gmail.com]

 This would seem to be a motivation for users to ‘buy’ higher ends cards/dev kits, be a marketing differentiator, and reduce the wait time for users.

 If it were possible, I would certainly be interested in that offering.

[archangel-lightworks]

nice...

I'm sure someone proposed that sometime. In the business world there aren't good or bad ideas, only ideas with and without a market. While the formulation is simple "let's use the FPGA power to muscle up Vivado", the road to it is not as simple, just rewriting software for true parallel processing is a big investment. Is there a market? Maybe, maybe not... Many users are happy with current synthesis time and optimization, others would decide to go for the slower/ cheaper option, so Xilinx will have to keep both 'plain PC' and 'accelerated' products. Lots of money in maintenance, upgrading, compatibility, support... I'm not saying the idea is bad, is actually quite good, just pointing out how things work in the real world: driven by $$$.

[dpaul24]

+1 for the above reply!

Can be done, but it is simply not worth the time & money in my perspective.

Similar to the reason why companies would buy a DDR* Controller IP core or SATA* IP core rather than in-house developing them.

Moreover with NVMe based storages along with memories and CPU cores getting cheaper, I would rather upgrade my workstation than buy an accelerator card.

If this is something of a university project or research stuff, then yes, the motivation is different.

[drjohnsmith]

It has been looked at a few times over th edecades I've been involved in this sort of thing.

Th ecrux boils down to the algorithum.

FPGAs get their speed by massively parallelising the problem,

   CPU increas speed by pure grunt.

Unfortuantly , all the algorithums for place / synthesis etc , are written for CPU's, so th ecode just does not fit well on FPGA's.

I have sene some GPU / FPGA accelerator cards for simulation a good few years back, but as mentioned by others as it takes a good year or two to develop a new board, the bang per buck, is less than just getting the latest CPU / memmory whihc is on a 6 months update cycle and backward compatable.

[archangel-lightworks]

@drjohnsmith 

"all the algorithms are written for CPUs"

Yes, but these can be accelerated while still keeping the CPU backbone.

with the rest I agree, is not as easy os of today resources and market.