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Registered: ‎02-10-2009

FPGA utilization threshold

Is there any general guidelines to what level you should utilize the logic resources in a given FPGA device before you start consider moving over to a bigger device?


I know it is a question without a straight answer, but I am asking it anywayJ:




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Teacher eteam00
Registered: ‎07-21-2009

Re: FPGA utilization threshold

I consider 75% to 80% utilisation the threshold beyond which place, route, and timing begins to require more design effort.


If developing a cost-sensitive, high-volume product, it makes sense to develope the FPGA design on a platform which is considerably larger and faster than what you will need.  When it is time for a production prototype, you will have a much better idea of the minimum FPGA size to fit your design -- much of the design risk (for either not enough gates or excessive cost) has been settled.


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