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Explorer
Explorer
2,617 Views
Registered: ‎11-06-2011

Generic question

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Hey.

 

I have a question about the usage of generics.

 

Lets say I have the following user logic (without the ports)

 

===========================================================================================

 

entity user_logic is
  generic
  (
    -- ADD USER GENERICS BELOW THIS LINE ---------------
    
    Clk_num_2_us_Delay             : std_logic_vector     := X"000000C8";
     Clk_num_250_ns_Delay           : std_logic_vector     := X"00000019";
     Clk_num_30_ns_Delay             : std_logic_vector     := X"00000003";
     Clk_num_40_ns_Delay             : std_logic_vector     := X"00000004";
    
    -- ADD USER GENERICS ABOVE THIS LINE ---------------

    -- DO NOT EDIT BELOW THIS LINE ---------------------
    -- Bus protocol parameters, do not add to or delete
    C_SLV_DWIDTH                   : integer              := 32;
    C_NUM_REG                      : integer              := 3
    -- DO NOT EDIT ABOVE THIS LINE ---------------------
  );

 

===========================================================================================

 

In the upper level I also get those generics from the generics map

 

===========================================================================================

 

entity ad7655 is
  generic
  (
    -- ADD USER GENERICS BELOW THIS LINE ---------------

     Clk_num_2_us_Delay             : std_logic_vector     := X"000000C8";
     Clk_num_250_ns_Delay           : std_logic_vector     := X"00000019";
     Clk_num_30_ns_Delay             : std_logic_vector     := X"00000003";
     Clk_num_40_ns_Delay             : std_logic_vector     := X"00000004";

 

===========================================================================================

 

This is the instantiate

 

===========================================================================================

 

USER_LOGIC_I : entity ad7655_v1_00_a.user_logic
    generic map
    (
      -- MAP USER GENERICS BELOW THIS LINE ---------------

        Clk_num_2_us_Delay => Clk_num_2_us_Delay,
       Clk_num_250_ns_Delay  =>  Clk_num_250_ns_Delay,
       Clk_num_30_ns_Delay => Clk_num_30_ns_Delay,
       Clk_num_40_ns_Delay => Clk_num_40_ns_Delay,

 

===========================================================================================

 

My question is about the defualt value of those generics.

for example

 

Clk_num_2_us_Delay             : std_logic_vector     := X"000000C8";

 

Lets say I set Clk_num_2_us_Delay  to X"000000C0" in the XPS.

Wouldn't it be set again to X"000000C8" in the user logic?

 

Thanks a lot.

 

Assaf.

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Highlighted
Teacher
Teacher
3,218 Views
Registered: ‎08-14-2007

Re: Generic question

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Hi assaf,

no. The purpose of having a default is to be overwritten by an actual value.

 

When a generic is declared in an entity, the assigned value acts as a default UNLESS no assignment is made in the generic map of the instantiation.

 

Different instantiations of the same model can assign different values to the same generic.

e.g. you have a counter model with a generic that is set to 8, thus creating a 8 bit counter by default.

Your toplevel can then have numerous instances of this model and so you may get 4, 8, 13 and 43 bit wide counters.

Remember, each instance creates independent hardware.

 

Have a nice synthesis

  Eilert

 

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Highlighted
Teacher
Teacher
3,219 Views
Registered: ‎08-14-2007

Re: Generic question

Jump to solution

Hi assaf,

no. The purpose of having a default is to be overwritten by an actual value.

 

When a generic is declared in an entity, the assigned value acts as a default UNLESS no assignment is made in the generic map of the instantiation.

 

Different instantiations of the same model can assign different values to the same generic.

e.g. you have a counter model with a generic that is set to 8, thus creating a 8 bit counter by default.

Your toplevel can then have numerous instances of this model and so you may get 4, 8, 13 and 43 bit wide counters.

Remember, each instance creates independent hardware.

 

Have a nice synthesis

  Eilert

 

View solution in original post