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Visitor
Visitor
5,859 Views
Registered: ‎01-09-2010

How to design an LUT in vhdl for Reconfigurable routing

Hello all,

   I am currently doing a project on designing the LUT for the purpose of Reconfigurable routing. I have asked to give 4 inputs and the configuration as another input and depending on the inputs the outputs are obtained (I have done this) and for the configuration input I should give the configuration as an input and depending on the configuration which I am giving I should get an output which should be readable and the input should be rewritable. Could anyone guide me in doing this task. If possible can anyone send me the sample code in VHDL.

 

 

 Thank you in advance,

   Mahe   

 

 

 

 

 

 

 

 

Message Edited by ndmahesh21 on 01-27-2010 04:39 AM
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3 Replies
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Teacher
Teacher
5,838 Views
Registered: ‎08-14-2007

Hi Mahe,

your description is a very obfuscated request for a simple combinatorical multiplexer code.

You will find examples in the xilinx templates and in most any vhdl textbook.

 

Have a nice synthesis

  Eilert

 

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Visitor
Visitor
5,815 Views
Registered: ‎01-09-2010

Hi Eilert,

  Thank you very much for your reply. As you told I have done the combinatorial Mux, after completing this I would like to know how to place this one combinatorial mux into different blocks and how to interconnect them. As I am new to VHDL I would like to know from you.

 

regards,

mahe 

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Teacher
Teacher
5,811 Views
Registered: ‎08-14-2007

Hi Mahe,

that's called instantiation.

 

You can declare a COMPONENT, and then instantiate it multiple times.

Connections between instances are handeled by SIGNALS in the PORT MAP.

This can be done each by each or automated using the GENERATE statement.

 

It's very much like doing a schematic, just with a text editor.

 

See the text books for syntax details and examples.

 

Have a nice synthesis

  Eilert

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