We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

Showing results for 
Search instead for 
Did you mean: 
Visitor sarayzdn
Registered: ‎11-09-2018

Is there any chance to realize software based high power/frequency switching in FPGA?


Today, in the world of power electronics, the new semiconductor based technology has come up with GaN/SiC based switching...

My question is: Is there a future where these isolated solutins of finding a material that can handle power delivery vanishes to the time that we can have "Power FPGAs"? Is there any way that FPGAs can realize the power converters in a software basis and actually deliver high ranges of power?

Like, is there any research on realizing an e.g. software based power buck converter with FPGA?

0 Kudos
1 Reply
Scholar u4223374
Registered: ‎04-26-2015

Re: Is there any chance to realize software based high power/frequency switching in FPGA?

I doubt that a "power FPGA" will ever be built. Some reasons:


- For high-power work, you really want to minimize the number of transistors that the power has to go through - no matter how good they are, they're not going to be as efficient as copper wire/traces.  An FPGA invariably puts the signal through a lot of transistors; it's never going to be very efficient.

- Obviously high-power works against high performance. If your transistors are 5mm² (to handle the high power) then your shiny new FPGA is going to have about the same number of resources as the smallest CPLDs you can buy.

- Since FPGAs are all LUT-based, I'm not sure that high-power even makes sense. CPLD architecture (logic gates) might be more reasonable.


With that said, I can imagine a manufacturer doing a dual-die solution with a conventional FPGA plus a bunch of big MOSFETs all in one package, to make a highly-configurable "smart SMPS" chip. Basically take one of the current PMBUS chips, remove all the hard-wired logic from that, and stick an FPGA in that space instead.

0 Kudos