07-27-2018 08:19 PM
I have a burning question:
What is the Min energy used for switching the FPGA on and performing an operations, execute then switch off/ idle?
Looking at a low cost FPGA or CPLD (for mass production)
Anyone here that has experiences in that or where I should look?
Any help greatly appreciated thanks!
07-30-2018 01:05 AM
Depends what the operation is, obviously.
If the operation is "set pin C12 to logic 1", then a CoolRunner II is likely to be the lowest power Xilinx option. You don't waste power with configuration (because the CRII is flash-based), and you don't waste static power because there's hardly any circuitry in there.
If the operation is "identify all objects in 3000 hours of UQHD video" then I suspect the lowest total energy consumed will be the smallest Kintex UltraScale+ that can fit the required processing hardware in it.
07-30-2018 01:10 PM
It is really great, 13 μA quiescent current and on 125Mhz 50mA x 3.3V for 256 macrocells and around 20$ per unit
I wonder how many coolrunner chips I need for 1 Artix7 and 210K Logiccells and around 50$ per unit
the XC7A50T has ICCINTQ + 120 ICCAUXQ + 40 ICCOQ + 40 mA per bank ICCBRAMQ + 60 mA ~ 500mW in nomal operation and when in suspended state how much power does it consume?
in term for synthesis my design has hardly no flip flops
I can simply synthesise and compare the seize and use the Xilinx Power Estimator (XPE) tools I am sorry for my question I should have just looked at the DC and AC Switching Characteristics Datasheets, then syntesise and then use the XPE.
I'm all set thanks for the help anyways