11-22-2016 08:38 AM
There is an article about the patterns used for testing RAM. Some patterns were: 0x55, 0xAA, 0x0F. There were some other ones. One in particular is the pattern: 0x03. I can't figure this one out. Patterns like 0x55 and 0xAA should check for sticky bits. What is the 0x03 used for?
11-22-2016 10:26 AM
Test patterns are developed based on what can (and does) go wrong. They are usually similar, often a secret of the vendor, as they relate to the physical layout and yield.
Xilinx BRAM use 0's, 1's, checkerboard (55H) and checkerboard bar (AAH) prior to configuration to replace any bad bits with a spare column.
11-22-2016 03:12 PM
One paper I read is: "An Efficient Built-in Self Test (BIST) Methodology for Testing Configurable Embedded Memories in FPGAs", by Daniel Milton. Actually there was another similar paper by several authors that I read which had a flow chart of how to perform the test, but each of them specify the 0x0303 sequence. What does this sequence test for?
11-22-2016 06:17 PM
Listen to Austin when he says "Test patterns are developed based on what can (and does) go wrong."
> Patterns like 0x55 and 0xAA should check for sticky bits.
If you just want to check for sticky bits, all zeros and all ones (0x00 and 0xff) should be adequate.
0x55 and 0xAA make sure that every adjacent bit in a word is different. Presumably there's some potential fault in the RAM that can be discovered by programming adjacent bits to different values.
But ... how do you know which bits are adjacent on the die? Just because they're adjacent in your idea of a word, doesn't necessarily make it that way on the die.
Perhaps there's a potential fault that could only be picked up by having a different value in bits that are two apart (I'm thinking of a layout that has the odd numbered bit sense amplifiers on one side of the array and the even numbered ones on the other side). You'd need a pattern like 0x33 to put different values on adjacent sense amplifiers.
For your interest, perhaps read about Rowhammer for the sort of things that can couple between bits that are widely separated in the address space yet still be adjacent on the die.
11-23-2016 05:10 AM
I think all these patterns are just a method to simplify/speed up a full walking '1's and '0's test.
So, you put out 00/FF (all on/off) 55/AA (alternating) 33/CC (2 bit pairs) 0F/F0 (4 bit quads) which is a total sequence of 8 patterns as opposed to a full walking 1's/0's which is a sequence of 16 patterns.