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Explorer
Explorer
6,089 Views
Registered: ‎08-23-2011

Virtex6+GTX wizard ....

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hi,

 

i had a few questions regarding my understanding of the GTX wizard IP for virtex6 FPGA. basically i have my own PCIe controller core with a PIPE interface to the PHY. and I want to validate the controller, i dont have a PCIe PHY but i plan to use xilinx GTX IP core for for PHY. so my questions are -

 

1) we can generate the GTX wrapper in PCIe protocol template. will that give a "true" PIPE interface or some other "almost similar" interface?

2) in case the GTX wrapper (configured for PCIe) is not PIPE, then what type of interface is it? any doc where i can find this exact detail?

3) is my understanding correct that GTX wrapper to the V6 transcievers acts as a PHY (configured for PCIe)?

4) in theory, is my understanding correct that i can interface my pcie controller's PIPE interface to the GTX wrapper interface to get a total PCIe solution?

 

please let me know ...

 

thanks in advance ...

 

z.

 

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Xilinx Employee
Xilinx Employee
10,344 Views
Registered: ‎07-31-2012

Hi,

 

 

1) we can generate the GTX wrapper in PCIe protocol template. will that give a "true" PIPE interface or some other "almost similar" interface? 2) in case the GTX wrapper (configured for PCIe) is not PIPE, then what type of interface is it? any doc where i can find this exact detail?

 

A: The similar GT wizard generated template for PCIE is used for the PCIE core of Xilinx and hence it should be a PIPE interface. You can create it and find out

 

 

 

3) is my understanding correct that GTX wrapper to the V6 transcievers acts as a PHY (configured for PCIe)?

A: Yes, it correct, the GTX wrapper is the PHY for the PCIe. That is what even our PCIE cores use.

 

4) in theory, is my understanding correct that i can interface my pcie controller's PIPE interface to the GTX wrapper interface to get a total PCIe solution?

A: Yes, we have customers who use similar solutions with their custom controller with GT PHY. 

 

 

 

Thanks,
Anirudh

PS: Please MARK this as an answer in case it helped resolve your query.Give kudos in case the post guided you to a solution.

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Xilinx Employee
Xilinx Employee
6,070 Views
Registered: ‎02-06-2013

Hi

 

Check the below link on a similar topic,which will answer your queries

 

http://forums.xilinx.com/t5/General-Technical-Discussion/PCIe-on-virtex6-using-high-speed-io-card-XAPP1022/td-p/550934

Regards,

Satish

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Xilinx Employee
Xilinx Employee
10,345 Views
Registered: ‎07-31-2012

Hi,

 

 

1) we can generate the GTX wrapper in PCIe protocol template. will that give a "true" PIPE interface or some other "almost similar" interface? 2) in case the GTX wrapper (configured for PCIe) is not PIPE, then what type of interface is it? any doc where i can find this exact detail?

 

A: The similar GT wizard generated template for PCIE is used for the PCIE core of Xilinx and hence it should be a PIPE interface. You can create it and find out

 

 

 

3) is my understanding correct that GTX wrapper to the V6 transcievers acts as a PHY (configured for PCIe)?

A: Yes, it correct, the GTX wrapper is the PHY for the PCIe. That is what even our PCIE cores use.

 

4) in theory, is my understanding correct that i can interface my pcie controller's PIPE interface to the GTX wrapper interface to get a total PCIe solution?

A: Yes, we have customers who use similar solutions with their custom controller with GT PHY. 

 

 

 

Thanks,
Anirudh

PS: Please MARK this as an answer in case it helped resolve your query.Give kudos in case the post guided you to a solution.

View solution in original post