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Visitor
Visitor
10,653 Views
Registered: ‎08-28-2015

Vivado USR_ACCESSE2

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Please move this thread if it fits somewhere else.

I'm working with Vivado for the VC707 board and now I need the USR_ACCESSE2 register (A JTAG register to get a hardware cofiguration revision number). I found this thread and this one. In the user guide ug953 and xapp497 there are only commands for ISE and related tools. And a static information is completly fine for me, i don't need that data-interface via VHDL. So here are my questions:

  • How do I translate the old command "bitgen -g USR_ACCESS TIMESTAMP" to the new tools (generate bitstream step)?
  • If this command is not implemented (yet) how do I set my constrains inside my .xdc correct for my board or works the instantiation ot of the box?
  • How do I save information with the instantiation?

I hope I missed something and you can help me. TIA!

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Explorer
Explorer
19,675 Views
Registered: ‎10-05-2010

This is what I have in my .xdc file:

set_property BITSTREAM.CONFIG.USR_ACCESS TIMESTAMP [current_design]

 

I don't have any special bitstream project settings.

 

---

Joe

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Explorer
Explorer
19,676 Views
Registered: ‎10-05-2010

This is what I have in my .xdc file:

set_property BITSTREAM.CONFIG.USR_ACCESS TIMESTAMP [current_design]

 

I don't have any special bitstream project settings.

 

---

Joe

View solution in original post

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Scholar
Scholar
10,612 Views
Registered: ‎06-05-2013

@smnsext Command given by @josephsamson is all you want.

-Pratham

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Visitor
Visitor
10,606 Views
Registered: ‎08-28-2015

Nice, it worked. NOW I know the correct search term, but i did'nt find a solution with "USR_ACCESSE2".

 

Now I'm working on a script to get the actual SVN revision and I'm fine, thank you!

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Contributor
Contributor
4,054 Views
Registered: ‎10-24-2013

The document XAPP1232 under this link : https://www.xilinx.com/support/documentation/application_notes/xapp1232-bitstream-id-with-usr_access.pdf

explains how to quite elaborately.

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