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Visitor
Visitor
11,349 Views
Registered: ‎10-11-2013

XC95144 Programming and unsual problem

Dear All,

 

I am using the XC95144-10 device with the ISE 13.2 and I am facing the following problem:

 

1. I have one signal "HW_ERR" that is connected to an OBUF an is connected to one output pin.

2. The same signal "HW_ERR" is connected to one inverter and goes to another OBUF connected to other output pin.

3. However, one output changes the value and the other doesn't change.

4. If I make a change in a different part of the circuit of the ISE 13.2 .sch files, with no relation with this signal, the behaviour comes back to normal (the two outputs change as expected).

 

There is something to configure that may lead to unexpected behaviour of the XC95144? 

 

Additionaly, what it the more update tool that can be used for this device (with the capability to import ISE 13.2 designs)?

 

Best regards,

Oscar 

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Professor
Professor
11,346 Views
Registered: ‎08-14-2007

You should check the equations from the fitter to see if your problem stems from a duplicated register.  For example you have a register (flip-flop) whose output is called HW_ERR_int in the design, then two outputs that are sourced by HW_ERR_int and (not HW_ERR_int) respectively.  The tools may elect to instead create two registers (flip-flops), one in each output signal's macrocell, that replicate the HW_ERR_int functionality.  In this case, if the signals that control HW_ERR_int are not synchronous to its clock, you can have cases where one of the replcated registers toggles and another doesn't when an input changes too close to the clock edge.  This sort of behavior will depend on relative routing delays, which could explain why changing another part of the design could influence the behavior.

 

You can place a KEEP constraint on HW_ERR_int (internal signal before the inverting and non-inverting output buffers).  That should prevent the register replication.

-- Gabor
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Professor
Professor
11,343 Views
Registered: ‎08-14-2007

Just noticed your second question.

 

ISE 14.7 is the latest version that supports XC9500 series CPLD's.  It's not clear whether there is any significant improvement related to CPLD's in the newer releases.  I seem to recall that support for Spartan 6 and newer parts was the main focus of the upgrade from 13.x to 14.x ISE.

-- Gabor
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Visitor
Visitor
11,262 Views
Registered: ‎10-11-2013

Dear Gabor,

 

These are the equations on the list. The HW_ERROR and the CPLD_LED_10 are complementary signals.

 

HW_ERROR <= NOT ((NOT IDC_1_ERR AND NOT PWM_STACK_1_ERR AND NOT PWM_STACK_2_ERR AND
      NOT PWM_STACK_3_ERR AND NOT SUPPLY_DIN_ERR AND NOT IR_ERR AND NOT IS_ERR AND NOT IT_ERR AND
      NOT UDC_1_ERR AND NOT UDC_4_ERR AND NOT URS_ERR AND NOT UTR_ERR AND
      NOT PWM_OVERLAP_ERROR AND NOT XLXN_2807));

 

CPLD_LED_10 <= (NOT IDC_1_ERR AND NOT PWM_STACK_1_ERR AND NOT PWM_STACK_2_ERR AND
      NOT PWM_STACK_3_ERR AND NOT SUPPLY_DIN_ERR AND NOT IR_ERR AND NOT IS_ERR AND NOT IT_ERR AND
      NOT UDC_1_ERR AND NOT UDC_4_ERR AND NOT URS_ERR AND NOT UTR_ERR AND
      NOT PWM_OVERLAP_ERROR AND NOT XLXN_2807);

 

The signals IDC_1_ERR , … ,XLXN_2807, are similar to this one (they intend to implement a limit latch):

 

XLXN_2807 <= ((NOT UST_SET)
      OR (GLOBAL_RST AND NOT CPLD_RESET_DSP AND XLXN_2807 AND
      DSP_CLR_HW_ERR AND CPLD_RESET_BOT));

 

I am not sure about how to implement your suggestion of a KEEP constraint on all of these signals. Can you please detail what do you mean? 

 

Best regards,

Oscar

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