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sravankumar
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Registered: ‎07-28-2011

Xilkernel - PPC405 - Timer ISR Handler

Hello Everyone,

 

I am facing a problem with xilkernel timer interrupt handling.

 

I am using xilkernel 4.00.a with PPC405 core. My configurations for software and hardware are as mentioned below for the project. Timer is generating interrupt, but its not entering the handler when used with xilkernel. Where as in standalone its generating interrupt and entering handler. There it is working perfectly. Problem is with xilkernel.  Do i need to call any function with PPC, as it is necessary with microblaze with xilkernel. (microblaze_enable_interrupts();)

 

mss file:

 

BEGIN OS
 PARAMETER OS_NAME = xilkernel
 PARAMETER OS_VER = 4.00.a
 PARAMETER PROC_INSTANCE = ppc405_0
 PARAMETER stdout = xps_uartlite_0
 PARAMETER stdin = xps_uartlite_0
 PARAMETER config_debug_support = true
 PARAMETER config_sema = true
 PARAMETER config_named_sema = true
 PARAMETER max_sem_waitq = 40
 PARAMETER max_sem = 90
 PARAMETER config_time = true
 PARAMETER max_tmrs = 20
 PARAMETER sysintc_spec = xps_intc_0
 PARAMETER sched_type = SCHED_PRIO
 PARAMETER static_pthread_table = (main_thread)
END

BEGIN PROCESSOR
 PARAMETER DRIVER_NAME = cpu_ppc405
 PARAMETER DRIVER_VER = 1.10.b
 PARAMETER HW_INSTANCE = ppc405_0
 PARAMETER COMPILER = powerpc-eabi-gcc
 PARAMETER ARCHIVER = powerpc-eabi-ar
 PARAMETER CORE_CLOCK_FREQ_HZ = 100000000
END
BEGIN DRIVER
 PARAMETER DRIVER_NAME = tmrctr
 PARAMETER DRIVER_VER = 1.10.b
 PARAMETER HW_INSTANCE = xps_timer_0
END

BEGIN DRIVER
 PARAMETER DRIVER_NAME = intc
 PARAMETER DRIVER_VER = 1.11.a
 PARAMETER HW_INSTANCE = xps_intc_0
END

 

mhs file:

 

BEGIN ppc405_virtex4
 PARAMETER INSTANCE = ppc405_0
 PARAMETER HW_VER = 2.01.a
 PARAMETER C_FASTEST_PLB_CLOCK = DPLB0
 PARAMETER C_IDCR_BASEADDR = 0b0100000000
 PARAMETER C_IDCR_HIGHADDR = 0b0111111111
 BUS_INTERFACE IPLB0 = plb
 BUS_INTERFACE DPLB0 = plb
 BUS_INTERFACE JTAGPPC = jtagppc_cntlr_0_0
 BUS_INTERFACE RESETPPC = ppc_reset_bus
 PORT CPMC405CLOCK = sys_clk_s
 PORT EICC405EXTINPUTIRQ = ppc405_0_EICC405EXTINPUTIRQ
END

BEGIN xps_timer
 PARAMETER INSTANCE = xps_timer_0
 PARAMETER HW_VER = 1.00.a
 PARAMETER C_BASEADDR = 0x84000000
 PARAMETER C_HIGHADDR = 0x840007FF
 BUS_INTERFACE SPLB = plb
 PORT Interrupt = xps_timer_0_Interrupt
END

BEGIN xps_intc
 PARAMETER INSTANCE = xps_intc_0
 PARAMETER HW_VER = 1.00.a
 PARAMETER C_BASEADDR = 0x30000000
 PARAMETER C_HIGHADDR = 0x3000FFFF
 BUS_INTERFACE SPLB = plb
 PORT Intr = xps_timer_0_Interrupt
 PORT Irq = ppc405_0_EICC405EXTINPUTIRQ
END


Software program for the configuration of timer with xilkernel and stand alone are as follows:


void TmrCtr_Handler(void)
{
    unsigned int reg=0;
    count1++;
    xil_printf("timer interrupt number %d\n\r", count1);
    reg = XTimerCtr_mReadReg(XPAR_XPS_TIMER_0_BASEADDR, 0, XTC_TCSR_OFFSET);
    XTmrCtr_mSetControlStatusReg(XPAR_TMRCTR_0_BASEADDR, 0, reg);
    if(count1 >= 10000)   
    count1 = 0;   
}


// Timer Initialization


void Initialize_Timer(void)
{

    /* STAND ALONE */
   
    /*
    XExc_Init();
    XExc_RegisterHandler(XEXC_ID_NON_CRITICAL_INT, (XExceptionHandler)XIntc_DeviceInterruptHandler, (void*)XPAR_INTC_0_DEVICE_ID);
    XIntc_RegisterHandler(XPAR_XPS_INTC_0_BASEADDR, XPAR_XPS_INTC_0_XPS_TIMER_0_INTERRUPT_INTR, (void *)TmrCtr_Handler, NULL);
                           
    xil_printf("--------Interrupt handler registered---\n\r");
    XIntc_mMasterEnable(XPAR_XPS_INTC_0_BASEADDR);   
    XTmrCtr_mWriteReg(XPAR_TMRCTR_0_BASEADDR, 0, XTC_TLR_OFFSET, RESET_VALUE);
    XTmrCtr_mSetControlStatusReg(XPAR_TMRCTR_0_BASEADDR, 0,  XTC_CSR_INT_OCCURED_MASK | XTC_CSR_LOAD_MASK );
    XTmrCtr_mSetControlStatusReg(XPAR_TMRCTR_0_BASEADDR, 0, XTC_CSR_ENABLE_TMR_MASK | XTC_CSR_ENABLE_INT_MASK | XTC_CSR_AUTO_RELOAD_MASK | XTC_CSR_DOWN_COUNT_MASK );
    XIntc_mEnableIntr(XPAR_XPS_INTC_0_BASEADDR, XPAR_XPS_TIMER_0_INTERRUPT_MASK);
    XTmrCtr_mEnableIntr(XPAR_TMRCTR_0_BASEADDR, 0);
    XExc_mEnableExceptions(XEXC_NON_CRITICAL);
    xil_printf("-------------Settings Done-----------\n\r");
    */
   
    /* XILKERNEL*/


     
    status = register_int_handler(ID, (void *)TmrCtr_Handler, NULL);
    if(status == XST_SUCCESS)
    xil_printf("------Interrupt handler registered----\n\r");

    XTmrCtr_mWriteReg(XPAR_TMRCTR_0_BASEADDR, 0, XTC_TLR_OFFSET, RESET_VALUE);
    XTmrCtr_mSetControlStatusReg(XPAR_TMRCTR_0_BASEADDR, 0,  XTC_CSR_INT_OCCURED_MASK |   XTC_CSR_LOAD_MASK );
    XTmrCtr_mSetControlStatusReg(XPAR_TMRCTR_0_BASEADDR, 0, XTC_CSR_ENABLE_TMR_MASK | XTC_CSR_ENABLE_INT_MASK | XTC_CSR_AUTO_RELOAD_MASK | XTC_CSR_DOWN_COUNT_MASK );
    xil_printf("-----------Timer settings done--------\n\r");
       
 
    enable_interrupt(ID);
    xil_printf("-------Timer interrupt enabled--------\n\r");
   
           
}

int main()
{
    xil_printf("entering main\n\r");
   
    xilkernel_main();
    return 0;
}

void main_thread (void)
{
   
    xil_printf("entering main thread\n\r");

    Initialize_Timer();
   
    count_time = XTimerCtr_mReadReg(XPAR_XPS_TIMER_0_BASEADDR, 0, XTC_TCSR_OFFSET);
    xil_printf("timer int data  : %08X\n\r", count_time);
    while(1)
    {
        count_time = XTimerCtr_mReadReg(XPAR_XPS_TIMER_0_BASEADDR, 0, XTC_TCSR_OFFSET);
        if(count_time & XTC_CSR_INT_OCCURED_MASK)
        {
            xil_printf("Interrupt\n\r ");
            xil_printf("Timer CSR : %08X\n\r", count_time);
            XTmrCtr_mSetControlStatusReg(XPAR_TMRCTR_0_BASEADDR, 0, count_time );
        }
    }
}

Please help me.

 

Thanks & Regards,

Sravan

 

 

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sravankumar
Visitor
Visitor
2,551 Views
Registered: ‎07-28-2011

Hello everyone,

 

Initially i was using xps_ll_temac and fifo also. I removed those to interrupts and tried with only a timer interrupt. It works fine. Earlier timer had less priority. Now it works with interrupt connected to timer alone. But i need to add those interrupts also.

 

What should i do?

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