Zynq 706 custom memory controller with mig phy ERROR: Activate Failure. Bank 0 must be Precharged.
I am currently working on building a custom memory controller with mig phy. The init_calib_complete is done (phy calibration is completed). The problem I am facing is timing errors with DDR. I am encountering the following errors:
- ERROR: Activate Failure. Bank 0 must be Precharged.
- ERROR: NOP or Deselect is required when CKE goes active.
I have given the values of the memory timing parameters as per the data sheet of the DDR. I am using vivado 2014.4.