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Explorer
Explorer
6,692 Views
Registered: ‎03-31-2011

clock issue in zynq custom ip

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Hi,

 

I am using zynq zc702 and I have designed couple of custom ip which are written in verilog module and would reside in PL section, now my design is working fine and the ps and pl communicatioo means i.e. arm with custom ip is done..but in my verilog design there is clk input and I need to measure ,the time required for executing my verilog module, from simulation, I know how many clk cycle has been elapsed ,so it would be easire to find out .

 

but what is the frequncy of PL section..? is it FCLK_CLK0? now in my custom ip, i had to use Bus2IP_Clk as clk input to my verilog design..so is this same as clock frequncy of my zynq board?

 

regards

 

 

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1 Solution

Accepted Solutions
Adventurer
Adventurer
8,606 Views
Registered: ‎10-29-2010

Re: clock issue in zynq custom ip

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Joy,

 

Your custom IP has port called S_AXI_ACLK now this same as IP2BUS_clk..now check the .mhs in XPS, if you find that in FCLK_CLK0 is port mapped to S_AXI_ACLK ( this  usually happens)..Then FCLK_CLK0 is the clock source to your IP. In XPS from Zynq tab,,click on clock generation, you would find the frequncy of FCLK_CLK0..usually 50Mhz...

 

I would prefer to use vivado and IPI for this designs..as this port connections seems to be much clear there..

 

thanks

6 Replies
Scholar austin
Scholar
6,687 Views
Registered: ‎02-27-2008

Re: clock issue in zynq custom ip

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table 25-1, ug585

 

The AXI bus clock may be selected to be some number of values.

 

100 MHz is a selection, as are 133, and 200 MHz.

 

So, the clock you choose and the settings, will provide you with what is happening...

 

Table 25-2 lists all the available peripheral clock rates as a multiple  of the system clock for the CPU's.

 

25-3 lists examples.

 

25-10 lists the clcoks you requested.

 

 

Austin Lesea
Principal Engineer
Xilinx San Jose
Adventurer
Adventurer
8,607 Views
Registered: ‎10-29-2010

Re: clock issue in zynq custom ip

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Joy,

 

Your custom IP has port called S_AXI_ACLK now this same as IP2BUS_clk..now check the .mhs in XPS, if you find that in FCLK_CLK0 is port mapped to S_AXI_ACLK ( this  usually happens)..Then FCLK_CLK0 is the clock source to your IP. In XPS from Zynq tab,,click on clock generation, you would find the frequncy of FCLK_CLK0..usually 50Mhz...

 

I would prefer to use vivado and IPI for this designs..as this port connections seems to be much clear there..

 

thanks

Highlighted
Contributor
Contributor
6,634 Views
Registered: ‎05-24-2013

how to give Clock in zynq custom ip PL section

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HEY

 

I am inspired from your topic , i Have a similar but different problem , I Have design a parameterised counter using ip pakager now i make a new system where i called that Ip , now user changed parameter i.e. counter width .

 

now since i made output as external but how to give clock and reset and standalone run that for behavioural simulation

 

so any solution to that , secondly do i need to use PS section to drive clock for my IP 

or A test bench is sufficient to run the behavioural simulation 

 

secondly can i generate a bit file and test that design on Zedboard , then how to write the ucf/xdc file.

 

please help me , i am working to resolve such from lasr 120 hours 

Tags (1)
crc_ipi2.png
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Contributor
Contributor
6,621 Views
Registered: ‎05-24-2013

Re: clock issue in zynq custom ip

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can you give your design PDF so we can do such exercise 

we will be grateful to you 

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Teacher eteam00
Teacher
6,613 Views
Registered: ‎07-21-2009

duplicate posts

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gaurav,

 

Please do not post multiple copies of your request in multiple threads.  And please do not pose a new question or problem in a thread which has already been marked as 'solved'.

 

Please keep discussion of your issue in the thread you have already created.

 

-- Bob Elkind

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Summary:
1. Read the manual or user guide. Have you read the manual? Can you find the manual?
2. Search the forums (and search the web) for similar topics.
3. Do not post the same question on multiple forums.
4. Do not post a new topic or question on someone else's thread, start a new thread!
5. Students: Copying code is not the same as learning to design.
6 "It does not work" is not a question which can be answered. Provide useful details (with webpage, datasheet links, please).
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8. I am not paid for forum posts. If I write a good post, then I have been good for nothing.
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Contributor
Contributor
6,603 Views
Registered: ‎05-24-2013

Re: duplicate posts

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Sorry , I will take care of the this in future and decorum of forum 

 

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