how to initialize the memory before run a processo...

peter_123 · ‎06-17-2011

Hi~

In my project, the processor is connect with a memory. The instuctions and data should be put into the memory before starting the processor. My question is how to initialize the memory(put the instructions and data into memory ) in a few cycles?

please tell me the procedures in VHDL, just like "readmemb" in verilog.

eteam00 · ‎06-17-2011

You should specify whether the memory to be loaded is internal to the FPGA, or external.

If the memory is internal to the FPGA (e.g. PicoBlaze), then the memory contents are naturally embedded in the configuration bitstream.

Perhaps some additional details would help provide you with a useful answer. For example, is this a custom board design or an off-the-shelf development board?

-- Bob Elkind

SIGNATURE:
README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369

Summary:
1. Read the manual or user guide. Have you read the manual? Can you find the manual?
2. Search the forums (and search the web) for similar topics.
3. Do not post the same question on multiple forums.
4. Do not post a new topic or question on someone else's thread, start a new thread!
5. Students: Copying code is not the same as learning to design.
6 "It does not work" is not a question which can be answered. Provide useful details (with webpage, datasheet links, please).
7. You are not charged extra fees for comments in your code.
8. I am not paid for forum posts. If I write a good post, then I have been good for nothing.

peter_123 · ‎06-18-2011

Hi~, eteam00,

thank you for your answer.

I just wanna simulate my processor in my project with ISE and ISIM, What I need to do is designing a ram, and take it as the memory. I think first I need to input the instructions and data into the ram in my testbench, my problem is How to initialize the memory in VHDL...

bassman59 · ‎06-20-2011

@peter_123 wrote:

Hi~, eteam00,

thank you for your answer.

I just wanna simulate my processor in my project with ISE and ISIM, What I need to do is designing a ram, and take it as the memory. I think first I need to input the instructions and data into the ram in my testbench, my problem is How to initialize the memory in VHDL...

You didn't answer Bob's questions.

----------------------------Yes, I do this for a living.

how to initialize the memory before run a processor?