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Registered: ‎06-03-2009

how to write data to the register via Jtag?

I want to write data to a register in the FPGA via jtag. I use the BSCAN_VIRTEX4 and write a tcl to write the data. But it did not work. This is the first time that I use the tcl and jtag. I don't know why?  The promblem is the tcl part or the verilog part?  The following is my code, I want to write data to the "mux_reg".

 

module jtag(
           
    output wire o_tdo);
    
reg[2:0] mux_reg;
wire     rst;
wire     shift;
wire     clk;
wire     tdi;
    
BSCAN_VIRTEX4 #(
      .JTAG_CHAIN(3))
BSCAN_VIRTEX_inst (
      .CAPTURE(),
      .DRCK(clk),      // Data register output for USER  functions
     
      .RESET(rst),     // Reset output from TAP controller
      .SEL(),              
      .SHIFT(shift),     // SHIFT output from TAP controller
      .TDI(tdi),             // TDI output from TAP controller
      .UPDATE(),      
      .TDO(o_tdo)       // Data input for USER function

   );
 
 
always @(posedge clk or posedge rst)
       if(rst)
     mux_reg <= 3'b000;
   else if(shift)
          mux_reg <= {mux_reg[1:0],tdi};

assign o_tdo = mux_reg[2];

endmodule

 

 

tcl:

 

source csejtag.tcl
source csejtagglobals.tcl


::chipscope::csejtag_session create messageRouterFn

::chipscope::csejtag_target open $handle $CSEJTAG_TARGET_AUTO 0
::chipscope::csejtag_target lock $handle 1000
::chipscope::csejtag_tap autodetect_chain $handle $CSEJTAG_SCAN_DEFAULT

 

set hextdobuf [::chipscope::csejtag_tap shift_device_dr $handle 0 $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 3 “101”]

::chipscope::csejtag_target unlock $handle
::chipscope::csejtag_target close $handle

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