i have setup image processing pipeline.
now i want to save small template (greyscale frame i.e 120x150 ) in ROM, and i want to recal
that template for comparison on each frame of video stream,during the process when
video streaming will be flowing through the FPGA board.
120x150 x 8bit pixels = 141Kbits (roughly). You could conceivably store this size reference frame in on-chip block RAM. Or you could store it in off-chip PROM, with some user logic for accessing the frame in PROM.
The video is flowing at 60 frames per sec and it is in NTSC 4:2:2 formate.
NTSC is a composite ~30FPS interlaced format. There is no such thing as "NTSC 4:2:2".
Let's try describing the video input again:
- interlaced or progressive
- Frame size in pixels (width and number of lines)
- frame rate
- composite or component RGB or component YUV
Do you have the time to spend learning FPGA design? Or do you want to focus your efforts to design the image processing algorithm and hire someone else to help with FPGA implementation?
- Bob Elkind
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