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Observer
Posts: 28
Registered: ‎11-11-2016
Accepted Solution

rotate right in verilog

Hi. I'm struggling making a 16 right rotating register. For the left rotation it was easy. Right rotating register has a glitch.

 

reg [15:0] result;
reg carry;

ROL:
             {carry, result} = operand0 << 1'b1;
             result[0] = carry;

ROR: WITH PROBLEMS!
             {result,carry} = operand0 >> 1'b1;
             result = {result,carry};
             result[15] = carry;

 

Let's assume result = 0x0002. After ROR instr. carry is set to 1, so the result will be 0x8001, instead of 0x0001. I want somehow the carry from {result,carry} concatenation to be outside the result, like a [-1] location similarly to a 17 location from the ROL concatenation. I hope you can understand me. Also, I do not want more than 16 flipflops after code synthesis.

 

Thanks you! 


Accepted Solutions
Scholar
Posts: 1,938
Registered: ‎04-26-2015

Re: rotate right in verilog

Wouldn't this work?

 

result = {operand0[0], operand0[15:1]};

 

 

View solution in original post


All Replies
Observer
Posts: 28
Registered: ‎11-11-2016

Re: rotate right in verilog

I'm interested in a borrow bit similarly to a carry bit.

Scholar
Posts: 1,938
Registered: ‎04-26-2015

Re: rotate right in verilog

Wouldn't this work?

 

result = {operand0[0], operand0[15:1]};

 

 

Highlighted
Observer
Posts: 28
Registered: ‎11-11-2016

Re: rotate right in verilog

Yes, it works.