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Explorer
Explorer
3,611 Views
Registered: ‎08-23-2011

verilog array initialization that works on hardware ...

hi,

 

i know that we can use the initial block to initialize an array in verilog (while using the initial block in a verilog module and not the testbench).

 

however will the initial block work in hardware / FPGA implementation for the bit file?

 

i looked online and it was mentioned that the initial block is not synthesizable but when i ran XST, right upto bitgen, all processes went through without any warning or errors saying initial block is not synthesizable etc. ...

 

so i just want to confirm if the initial block will work on hardware or not in an actual bit file?

 

and is there any other hardware based method that initializes the array (apart from MIF)?

 

thanks.

 

z.

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Teacher
Teacher
3,596 Views
Registered: ‎03-31-2012

Re: verilog array initialization that works on hardware ...

Initial blocks not being synthesizable is mostly an ASIC constraint and not an FPGA one. In FPGAs, during configuration initial values of registers can be set without having an explicit reset so for initial values are OK. MIF is similar to an initial value set by the tool.
The other hardware method is to add reset logic to your design so that you can initialize all the values you care about even after initial configuration.
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