when I synthesized my vhdl code i got the following warning.
warning XST 3211: can not use block ram resources for signal < mram_gnd_17_o_gnd_17_o_wide_mux_168_out>. please check that the content is read synchronously.
Please, can any onyone guide me how to solve this issue.
Thanl you in advance.
read the warning to the end. It says: "please check that the content is read synchronously"
So maybe you better use a clocked process for the part of your code that shall use the BRAM.
Have a nice synthesis