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shagarwal
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Registered: ‎09-26-2020

Basic I/O Concepts

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Hi

I wanted to understand the following terms in context of HLS.

1) I/O Ports

2) I/O Protocols

3) I/O Interface

 

Thanks!

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tedbooth
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Registered: ‎03-28-2016

@shagarwal 

1) I/O Ports are the physical inputs/outputs of a module.  Typically an I/O port consists of one or more pins.  It can be a simple as a single 1-bit signal or as complicated as an AXI-MM port which consists of multiple data buses, address busses and corresponding control signals.  In the higher level design, these pins are connected to the ports of the other modules in the design or to the I/O pins of the FPGA.

2) I/O Protocol is a definition of how the signals on an I/O Port are used to transfer data.  As an example, an AXI4-Stream Port consists of a number of signals (TData, TReady, TValid,...)  The I/O Protocol for the AXI4-Stream defines how the TReady and TValid signals are used to move data across the the TData bus.

3) I/O Interface is made up of the I/O Port and the I/O Protocol.  The AXI4-Stream Interface is made up of the AXI4-Stream Port definition and the AXI4-Stream Protocol definition.

Ted Booth | Tech. Lead FPGA Design Engineer | DesignLinx Solutions
https://www.designlinxhs.com

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tedbooth
Scholar
Scholar
527 Views
Registered: ‎03-28-2016

@shagarwal 

1) I/O Ports are the physical inputs/outputs of a module.  Typically an I/O port consists of one or more pins.  It can be a simple as a single 1-bit signal or as complicated as an AXI-MM port which consists of multiple data buses, address busses and corresponding control signals.  In the higher level design, these pins are connected to the ports of the other modules in the design or to the I/O pins of the FPGA.

2) I/O Protocol is a definition of how the signals on an I/O Port are used to transfer data.  As an example, an AXI4-Stream Port consists of a number of signals (TData, TReady, TValid,...)  The I/O Protocol for the AXI4-Stream defines how the TReady and TValid signals are used to move data across the the TData bus.

3) I/O Interface is made up of the I/O Port and the I/O Protocol.  The AXI4-Stream Interface is made up of the AXI4-Stream Port definition and the AXI4-Stream Protocol definition.

Ted Booth | Tech. Lead FPGA Design Engineer | DesignLinx Solutions
https://www.designlinxhs.com

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