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Observer
Observer
764 Views
Registered: ‎01-12-2012

Bug when using SystemC AXI4 Master Interface

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I have a fairly simple SystemC module (see below) with a SystemC AXI4 Master Interface (AXI4 M_bus_port). During the generation of the RTL by Vivado HLS 2018.3, the tool encountered an error generate_json error: error "not well-formed (invalid token)". Below is my source code:

 

producer0.cpp

#include "producer0.h"

#include <stdint.h>

#define OFFSET_DDR 0x20000000

using sc_core::sc_module;

producer0::producer0(sc_core::sc_module_name name)
:sc_module(name) {
	SC_CTHREAD(thread, clock.pos());
	reset_signal_is(reset, true);
}

void producer0::thread() {
	unsigned long data[16] = { 0 };
	#pragma HLS ARRAY_PARTITION variable=data complete

	while(1) {
		data[0] = 1;

		/*for(int i=1;i<16;i++)
			data[i] = data[i-1] + 1;*/

		axi_master_0->burst_write(OFFSET_DDR, 16, (int*)data);
	}
}

producer0.h

#ifndef PRODUCER0_H_
#define PRODUCER0_H_

#include "systemc"

using namespace sc_core;
using namespace std;
#include "AXI4_if.h"

class producer0: public sc_core::sc_module {
	public:
		SC_HAS_PROCESS(producer0);

		sc_core::sc_in< bool > clock;
		sc_core::sc_in< bool > reset;
		AXI4M_bus_port< int > axi_master_0;
		
		producer0(sc_core::sc_module_name name);

		void thread();
};

#endif

 

Vivado HLS log

...
INFO: [HLS 200-10] ----------------------------------------------------------------
INFO: [HLS 200-10] -- Generating RTL for module 'producer0'
INFO: [HLS 200-10] ----------------------------------------------------------------
INFO: [RTGEN 206-500] Setting interface mode on port 'producer0/clock' to 'ap_none'.
INFO: [RTGEN 206-500] Setting interface mode on port 'producer0/reset' to 'ap_none'.
INFO: [RTGEN 206-500] Setting interface mode on port 'producer0/axi_master_0' to 'ap_bus'.
INFO: [RTGEN 206-100] Finished creating RTL model for 'producer0'.
INFO: [HLS 200-111]  Elapsed time: 0.228 seconds; current allocated memory: 100.040 MB.
ERROR: [HLS 200-445] Unexpected error generating RTL model: generate_json error: error "not well-formed (invalid token)" at line 39 character 44
"ster_0.m_if.Val.data[ <--Error-- 0]>
<Name>memcpy.producer0.axi_master_0"
command 'ap_source' returned error code
    while executing
"source [lindex $::argv 1] "
    ("uplevel" body line 1)
    invoked from within
"uplevel \#0 { source [lindex $::argv 1] } "

INFO: [HLS 200-112] Total elapsed time: 34.047 seconds; peak allocated memory: 100.040 MB.
INFO: [Common 17-206] Exiting vivado_hls at Thu Oct 24 16:40:36 2019...
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1 Solution

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Observer
Observer
596 Views
Registered: ‎01-12-2012

Removing the following line solved the problem.

#pragma HLS ARRAY_PARTITION variable=data complete

View solution in original post

3 Replies
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Observer
Observer
651 Views
Registered: ‎01-12-2012
I edited the hls log to make it more user-friendly. Any thought ?
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Highlighted
Observer
Observer
597 Views
Registered: ‎01-12-2012

Removing the following line solved the problem.

#pragma HLS ARRAY_PARTITION variable=data complete

View solution in original post

Highlighted
Moderator
Moderator
520 Views
Registered: ‎11-21-2018

Hi @hguerard 

Thanks for updating the community with your solution. 

This is great as it will help other people with the same problem in the future. 

Could you mark your answer as a solution (click on "Accept as solution" button below the reply)? 

Regards, 

 

Aoife
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
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