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Newbie koidis
Newbie
4,817 Views
Registered: ‎10-14-2016

Control AXI DMA from PL module

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Hi I would like to control an AXI DMA module (Receive channel initialization, Sent channel initialization, DMA start etc) from my HLS component instead of the PS I suppose I have to implement an AXI4 Master interface but I can't find a tutorial on how to access specific addresses (control registers) inside the AXI DMA module.

 

Any Ideas?

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Teacher muzaffer
Teacher
8,668 Views
Registered: ‎03-31-2012

Re: Control AXI DMA from PL module

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It's very easy. All you need is an axi-master which writes to certain offsets. Assuming that this master is the only one controlling the AXI DMA block (ie directly connected to it instead of going through a multimaster interconnect) then you just write to the offsets described in axi dma spec ie the "AXI DMA Register Address map" so if the port which implements axi_master is "uint32* dma_ptr" you just have to say *(dma_ptr + 1) = foo;
to access the MM2S_DMASR register. This assumes you set the C_BASEADDR to zero
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4 Replies
Teacher muzaffer
Teacher
8,669 Views
Registered: ‎03-31-2012

Re: Control AXI DMA from PL module

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It's very easy. All you need is an axi-master which writes to certain offsets. Assuming that this master is the only one controlling the AXI DMA block (ie directly connected to it instead of going through a multimaster interconnect) then you just write to the offsets described in axi dma spec ie the "AXI DMA Register Address map" so if the port which implements axi_master is "uint32* dma_ptr" you just have to say *(dma_ptr + 1) = foo;
to access the MM2S_DMASR register. This assumes you set the C_BASEADDR to zero
- Please mark the Answer as "Accept as solution" if information provided is helpful.
Give Kudos to a post which you think is helpful and reply oriented.

View solution in original post

Newbie koidis
Newbie
4,629 Views
Registered: ‎10-14-2016

Re: Control AXI DMA from PL module

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You have been very helpful, 

 

thanks

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Observer msbaloglu
Observer
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Registered: ‎07-25-2019

Re: Control AXI DMA from PL module

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Hello, this thread is a very good example for my problem and thank you for your answer muzaffer. However, could you also tell me how can i connect an axi_master to axilite_slave without an interconnect? I have tried to use an axi_protocol_converter but my attempts have failed.

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Teacher muzaffer
Teacher
164 Views
Registered: ‎03-31-2012

Re: Control AXI DMA from PL module

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if you're following the suggestion and making a custom axi initiator (ie master, a terminology I'm trying move away from) then the easiest solution is to make an axi-lite initiator. It's very easy to change the code, by removing some features, to move from a full axi-initiator to a lite-initiator. Basically no burst, and a couple of other restrictions which you won't even notice are missing. Find an axi doc online which shows the differences between axi-full & axi-lite and use the latter.

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