I'm designing a vision system in Vivado HLS (without using HLS Video Library) for Zybo and I probably have a problem with DEPENDENCE pragma.
I created an IP core to convert RGB signal (from Digilent DVI to RGB Video Decoder core) to AXI4-Stream and I need a simple module for context pixel processing using 3x3 pixel window. I want to store 9 pixels of context window in variables p00 - p22, and the rest of two lines in two FIFOs, as in the picture:
I created a core that works perfectly in C-simulation and C/RTL cosimulation, but when i try to use it on a board I get only zeros in output stream (input stream is correct). I guess the problem is in wrong pragmas for buf1 and buf2 variables, but I tried different configurations and it still does'nt work. Could anyone look in the attached code and help me?
The obvious question is "what happens if you take out the pragmas?"
Does it work correctly but slower? Or does it do the same thing? If it does the same thing, the pragmas are not at fault.
The other simple thing to test is whether it's actually outputting zeros, or just outputting nothing at all. Set the RAM it's writing into to be all 0x12345678, and see what it looks like after the block finishes. If it's actually zeros, the block is actually doing something and we're just debugging HLS; if it's unchanged then your problem most likely lies elsewhere.