Showing results for 
Show  only  | Search instead for 
Did you mean: 
Registered: ‎08-16-2013

Error reporting for hls::stream FIFOs

I have an HLS design which uses hls::streams.  If I run an RTL co-sim and ignore my_stream.full() when writing to the stream, the simulation goes sideways.  This is clearly a self-inflicted wound, but the issue is that there doesn't seem to be a way for the HLS-generated RTL to report that things are bad.  The FIFO just overflows and chaos ensues.  There are no signals like ap_you_just_broke_stuff at the top level.  And digging down a little further, I see that the HLS-generated FIFOs don't even detect overflow.


Has anyone else encountered this?  What suggestions do you have for detecting FIFO overflow inside of HLS code?  My current thinking is to write a script to analyze the HLS RTL for FIFOs and then augment it with overflow checkers.  I'm really hoping there is a better way.

0 Kudos
1 Reply
Registered: ‎04-26-2015

I've taken to making the interfaces between critical functions external ports, so I can put an AXI4 Stream (with flow control) or AXI4 Stream FIFO in there. As you've found, the data management is somewhat limited. This has instantly resolved a few problems for me. Unfortunately it's not really practical when you have to bring a signal up through six layers of functions.


Your suggestion for a signal called "ap_you_just_broke_stuff" is great; I'd love to have a "debug" option where it uses a little bit more space but adds that port. Maybe also "ap_you_just_broke_stuff_you_idiot" for when you've done something really stupid that was clearly user-error, like providing an image with one column when you promised HLS that it'd have at least 400 columns to work with. You can always get ILA debug signals inside the block, but they're a pain in the neck to find (HLS signal naming is not its best feature) and you need a debug core, whereas signals provided by HLS could just go on the AXI-Lite bus.

0 Kudos