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Participant gustavsvj
Participant
143 Views
Registered: ‎02-25-2019

Execution deadlock

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Hello,

I've been trying to test the attached code on my FPGA recently. The goal is to read from an AXI-Stream and write the contents to memory. The code is targetted at the KCU105 with a clock frequency of 300MHz.

The C testbench behaves as expected. When running Cosim the C post checking output is correct but when inspecting the waveform the AXI master write isn't visible unless I write several packages (j < 2 in the testbench) and even then the last write is never visible on the waveform. My assumption is that it occurs because the function would have to be called a few extra times after inputting the last data for the write to begin.

When testing the code on the FPGA the behaviour is completely different. Here the input ready signal for the AXI-Stream simply goes low after 4 words of data. I'm guessing that my use of the internal streams is somehow wrong but I simply can't figure out how...

Any help will be much appreciated.

Kind regards,
Gustav

(I couldn't upload the files to the forum but they can be accessed here.)

#include "memory_writer.hpp"
#include <hls_stream.h>
#include <ap_axi_sdata.h>
#include <ap_int.h>
#include <string.h>

void performWrite(ap_uint<128> *ddr, hls::stream<uint128> &data, hls::stream<uint16> &head, hls::stream<bool> &dataRdy){

	if (!dataRdy.empty())
	{
		dataRdy.read();

		ap_uint<128> buff[96];
		ap_uint<32> address = head.read() * 96;
		ap_uint<32> size = 0;

		for (int i = 0; i < 96; i++){
#pragma HLS PIPELINE II=1

			if (!data.empty()){
				buff[i] = data.read();
				size += 16;
			}
			else{
				break;
			}
		}
		memcpy(ddr + address, buff, size);
	}

}


void readData(AXI_STREAM &s_axis_data, hls::stream<uint128> &data, hls::stream<uint16> &head, hls::stream<bool> &dataRdy){

#pragma HLS PIPELINE II=1

	enum stateType {HEAD_A, HEAD_B, READ_A, READ_B, CHECK_TAIL};
	static stateType state = HEAD_A;

	AXI_T dataIn;
	static ap_uint<128> dataBuff;
	static ap_uint<16> headBuff;

	switch(state){

	case HEAD_A:
		dataIn = s_axis_data.read();
		dataBuff = dataIn.data;
		state = HEAD_B;
		break;

	case HEAD_B:
		dataIn = s_axis_data.read();
		dataBuff(127,64) = dataIn.data;
		headBuff = dataBuff(127,112);

		data.write(dataBuff);
		head.write(headBuff);

		state = READ_A;

		break;

	case READ_A:
		dataIn = s_axis_data.read();
		dataBuff = dataIn.data;

		if (dataIn.last){
			data.write(dataBuff);
			state = CHECK_TAIL;
		}
		else{
			state = READ_B;
		}
		break;

	case READ_B:
		dataIn = s_axis_data.read();
		dataBuff(127,64) = dataIn.data;
		data.write(dataBuff);

		if (dataIn.last){
			state = CHECK_TAIL;
		}
		else{
			state = READ_A;
		}
		break;

	case CHECK_TAIL:
		dataRdy.write(true);
		state = HEAD_A;
		break;

	}


}


void memory_writer(AXI_STREAM &s_axis_data, ap_uint<128> *ddr, ap_uint<16> tail, ap_uint<16> *head)
{

#pragma HLS INTERFACE ap_none port=head
#pragma HLS INTERFACE ap_ctrl_hs port=return
#pragma HLS INTERFACE m_axi port=ddr depth=1000 offset=none
#pragma HLS INTERFACE axis port=s_axis_data

#pragma HLS dataflow

	static hls::stream<uint128>	dataFIFO("dataFIFO");
#pragma HLS STREAM variable=dataFIFO depth=128 dim=1
	static hls::stream<uint16>	headFIFO("headFIFO");
	static hls::stream<bool>	dataReadyFIFO("dataReadyFIFO");

	readData(s_axis_data, dataFIFO, headFIFO, dataReadyFIFO);
	performWrite(ddr, dataFIFO, headFIFO, dataReadyFIFO);

}

 

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Participant gustavsvj
Participant
109 Views
Registered: ‎02-25-2019

Re: Execution deadlock

Jump to solution

Dear All,

I managed to solve the problem by using ap_ctrl_hs when compiling and tying start to 1. Up until now I've used ap_ctrl_none when compiling without it leading to any problems but for some reason it didn't work with the updated code structure.

Kind regards,
Gustav

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1 Reply
Participant gustavsvj
Participant
110 Views
Registered: ‎02-25-2019

Re: Execution deadlock

Jump to solution

Dear All,

I managed to solve the problem by using ap_ctrl_hs when compiling and tying start to 1. Up until now I've used ap_ctrl_none when compiling without it leading to any problems but for some reason it didn't work with the updated code structure.

Kind regards,
Gustav

0 Kudos