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Visitor cc@noblis
Visitor
979 Views
Registered: ‎08-21-2018

HLS 2018.3 CSIM is BROKEN on Ubuntu 18.04 LTS

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I had this error under 2018.2, but then noticed that 18.04 LTS was only supported on 2018.3, so I uninstalled everything and installed fresh 2018.3.

INFO: [SIM 211-2] *************** CSIM start ***************
INFO: [SIM 211-4] CSIM will launch GCC as the compiler.
ERROR: [SIM 211-100] 'csim_design' failed: compilation error(s).
INFO: [SIM 211-3] *************** CSIM finish ***************
4
    while executing
"source /home/xxxxx/training/hls_tool_flow/lab/zcu102/dct/dct_prj/solution1/csim.tcl"
    invoked from within
"hls::main /home/xxxxx/training/hls_tool_flow/lab/zcu102/dct/dct_prj/solution1/csim.tcl"
    ("uplevel" body line 1)
    invoked from within
"uplevel 1 hls::main {*}$args"
    (procedure "hls_proc" line 5)
    invoked from within
"hls_proc $argv"
Finished C simulation.

Extremely frustrating to have no other debug information to figure out what's wrong. Finishing up day 2 of HLS training and haven't been able to get past Lab 1.

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1 Solution

Accepted Solutions
348 Views
Registered: ‎01-15-2019

Re: HLS 2018.3 CSIM is BROKEN on Ubuntu 18.04 LTS

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Hello,

I have seen the same issue with ubuntu 18.4 and Vivado 19.1.

I found this answer:

https://forums.xilinx.com/t5/Design-Entry/Vivado-2018-3-error-launch-hls/td-p/940856

So, after installing build-essential the issue gone.

sudo apt update
sudo apt install build-essential

 

Best,

Paul

6 Replies
Explorer
Explorer
967 Views
Registered: ‎03-26-2010

Re: HLS 2018.3 CSIM is BROKEN on Ubuntu 18.04 LTS

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Can confirm, have the same problem on my 18.04 box.

 

16.04 works fine.

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Xilinx Employee
Xilinx Employee
943 Views
Registered: ‎09-05-2018

Re: HLS 2018.3 CSIM is BROKEN on Ubuntu 18.04 LTS

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cc@noblis,

I'm not able to repdouce the issue. It's possible it's specific to certain project data? Another possibility could be that the OS is missing some dependency. Could you try the steps in this AR: https://www.xilinx.com/support/answers/66184.html?

Nicholas Moellers

Xilinx Worldwide Technical Support
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Visitor cc@noblis
Visitor
936 Views
Registered: ‎08-21-2018

Re: HLS 2018.3 CSIM is BROKEN on Ubuntu 18.04 LTS

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It's straight-out-of-the-box lab code from the Hardent HLS class, so unlikely to be project data.

 

ldd-recursive gives:

linux-vdso.so.1
librdi_common.so => not found
libtcmalloc.so.4 => not found
/usr/lib/x86_64-linux-gnu/libstdc++.so.6
/lib/x86_64-linux-gnu/libm.so.6
librdi_commonmain.so => not found
/lib64/ld-linux-x86-64.so.2
/lib/x86_64-linux-gnu/libgcc_s.so.1
libboost_signals.so => not found
/lib/x86_64-linux-gnu/libc.so.6

I installed libboost-signals-dev and that fixed the missing libboost_signals. I also installed libctmalloc-minimal4 and that did *not* fix the missing libtcmalloc.

I can't find any references to librdi_common* anywhere (other than Vivado trouble reports).

I should add, the UI itself runs fine and can synthesize. It's just CSIM that's b0rked.

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Visitor thomas66
Visitor
710 Views
Registered: ‎12-05-2009

Re: HLS 2018.3 CSIM is BROKEN on Ubuntu 18.04 LTS

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...do you have a line like:

#include "/opt/Xilinx/Vivado/2018.2/include/gmp.h"

in your header file?

I did and it was pointing to a none existing folder. The result was the errro you saw.

Found it by running make -f csim.mk in solution1/csim/build/csim

Regards

Thomas

349 Views
Registered: ‎01-15-2019

Re: HLS 2018.3 CSIM is BROKEN on Ubuntu 18.04 LTS

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Hello,

I have seen the same issue with ubuntu 18.4 and Vivado 19.1.

I found this answer:

https://forums.xilinx.com/t5/Design-Entry/Vivado-2018-3-error-launch-hls/td-p/940856

So, after installing build-essential the issue gone.

sudo apt update
sudo apt install build-essential

 

Best,

Paul

Moderator
Moderator
215 Views
Registered: ‎11-21-2018

Re: HLS 2018.3 CSIM is BROKEN on Ubuntu 18.04 LTS

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Hi cc@noblis 

If your question is answered or your issue is solved, please kindly mark the response which helped as solution (click on "Accept as solution" button below the reply).

 

If this is not solved/answered, please reply in the topic giving more information on your current status.

 

Thanks and Regards,

Aoife
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
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