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116 Views
Registered: ‎07-05-2019

HLS IP

Hello

I am trying to implement an iterative algorithm for image processing in HLS.

using HLS 2019.1. So I have my functions in place and the IP generates the expected output, but the algorithm is not complete yet.

I use a line buffer to feed in my image data to the IP and generate the output(as done in Xilinx's HLS example designs), but the algorithm has to this iteratively for N times, and ideally, I would like to be able to control this N, but for now, let's suppose its 5. So once I go through the entire process and throw the image out, I want to take this output back into my IP repeat the process 5 times, then apply some final operations and send the output out.

I would like to understand if something of this sort can be done and if, how do I proceed. I did look for examples and relevant information but really could not find much.

Hoping for some right direction here. This will enable me to implement a whole new set of algorithms.

Thank you.

  

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Participant
Participant
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Registered: ‎02-09-2019

Hey, i am not completely sure on how this works. but, if it were me, i would make the function call of the "ip_core" in a loop for 5 times in the test bench file. This will work just fine i guess. However, it will roughly increase the number of cycles by 5 times. if you want to reduce the number of cycles then you can create multiple instances of this ip, I guess that this can be done by writing the same function logic with a slightly different name. so the trade off would be between the available resources and number of cycles in this case.
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Registered: ‎07-05-2019

Hey 

Thank you for your suggestion, and if I have understood correctly you want me to call the same function 5 times. right?

See, if you read my problem statement above, I do want to apply the same function 5 times but not to the same image. The output from the first iteration becomes the input for the next iteration. For this, the output image that is stored in the build folder(default) has to be added to the test bench. Currently, for testing, I do that manually just to check the output but for final implementation but I need a better way. I am not sure but I think VDMA has to come into play. Looking into that option

Also adding multiple instances of the same IP in the design is extreme. Inefficient. Not even an option..just think if I need 15 iterations! Then, I cannot have 15 IPs lined. So that's the problem.

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Participant
Participant
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Registered: ‎02-09-2019

hello,
1. I understood your problem statement, may be i should have been more clearer, there are two options you can call the function 5 times either in the test bench or in the ip core. if you are calling the the function multiple times in the testbench you need make sure that that the input pointer is pointed to the output image after each iteration. If you are calling the function in an ip_core with streaming interface type you can do the same with the pointers (or) you can store the image temporarily in hls::mat type and then can process the stored image. For this type of designs, streams would be effective.
2.if you are using the streaming, you need to use either dma/vdma ip in Vivado IDE(not hls) to convert the memory mapped into streaming.
3.As I said, you need to design on the trade off between available resources and speed of the logic. if you are iterating the image for 100 times, obviously it doesn't make sense to have 100 duplicates. what I meant was you can use 2 or 5 duplicate's to slightly speed up the process. this is completely based on the designer choice
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Registered: ‎07-05-2019

I'm looking into the VDMA option, so let me try out as you suggested, and will get back to you.

Thank you!

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