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liujiawei_0308
Observer
Observer
517 Views
Registered: ‎09-16-2019

HLS floating point IP core

Hi,all.

I use HLS to generate an IP core for matrix inversion. The input and output data are of floating-point type.

I want to download this program to FPGA. Should I add a fixed-point to floating-point IP core before the input data and a floating-point to floating-point IP core after the output data. 

As far as I know, the data in FPGA is expressed in the form of fixed number of points. I want to know how FPGAs do floating-point arithmetic.

If you can solve my problem, please reply me。

Thanks.

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1 Reply
satguy
Explorer
Explorer
505 Views
Registered: ‎04-19-2018

"I want to download this program to FPGA"

What you probably want is to add your IP to a block design with the rest of necessary things that feed and collect data and configure your FPGA.

"Should I add a fixed-point to floating-point IP core before the input data and a floating-point to floating-point IP core after the output data"

Is that a question?

If your IP works with floats and your data is fixed, yes, you must.

"data in FPGA is expressed in the form of fixed number of points"

No. Bits are bits. Ones and zeros. What number they represent in human mathematics is not implicit. As an example, 0x11223344 taken as a float represents 1.2795344E-28, and as a fixed point, a different number.

"I want to know how FPGAs do floating-point arithmetic"

Really? do you care about how a calculator works? We have HLS exactly to not worry about how to implement a floating point product and that sort of things

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