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Explorer
Explorer
2,813 Views
Registered: ‎03-29-2017

How to declare sub and main Functions in Vivado HLS

Hi,

I am using 3 functions in my program. How to declare ?

 

Code

 

int codecheck(int (*h)[2],int x[])  // 1st Function
{

 

 

 

}

 

void InitializeChannelLLR (double var, int modulationScheme, int noOfSymbols, int x[], float L_ch[], float d, int (*h)[2], float LLR[]) // 2nd Function

 

{

.........

.....

}

 

int SPA(float LLR[], int (*h)[2], float LLR_ret[], float L_ch[],  float L_dec[], int y[],int x[]) // 3rd Function
{

......

........

......

}

 

int main()  // 4th Function.

 

Thanks.. How to execute in HLS

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14 Replies
Highlighted
Teacher
Teacher
2,781 Views
Registered: ‎03-31-2012

@thaus_015 if you want to make a block with all 3 functions in it, just make a single top level function which calls them. So

 

void top_func(the_necessary_top_level_ports_here) {

  func1(some of the top level ports, intermediate outputs);

  func2(previous intermediate outputs, intermediate outputs);

  func3(previous intermediate outputs, top level outputs);

}

 

then synthesize top_func in your project. Of course call top_fun in your main test bench too.

- Please mark the Answer as "Accept as solution" if information provided is helpful.
Give Kudos to a post which you think is helpful and reply oriented.
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Highlighted
Explorer
Explorer
2,751 Views
Registered: ‎03-29-2017

Hi,

 

I am getting lot of warning messages. What is wrong in the codes? Please check it

 

Source Code:

int codecheck(int (*h)[2],int x[])    //SUb- FUNCTION CALL
{
    int i,j,m,f; //flags
    int sum = 0;
    int y[ROWS_PARITYCHECKMATRIX];
    for (i=0;i<ROWS_PARITYCHECKMATRIX;i++)
    y[i]=0;
    m=1;
    f=-1;
    for(i=0;i<ROWS_PARITYCHECKMATRIX;i++)
    {
        for(j=0;j<ROWS_P;j++)
        {
            if(h[j][0]==i+1)
            {
                y[i]=y[i] + x[h[j][1]-1];
                    f++;
            }
        }
        y[i]=y[i]%2;

    }
    for (i = 0; i < ROWS_PARITYCHECKMATRIX; ++i)
        {
            sum =sum+ y[i];
        }
    if (sum == 0)
        {
            return 1;
        }
    else
        {
            return -1;
        }
}



int InitializeChannel (int noOfSymbols, int x[], float L_ch[],int (*h)[2], float LLR[])
{

    int j=0,t;
    for(j=0;j<ROWS_P;j++)
    {
          t=h[j][1]-1;
          LLR[j]=L_ch[t];
    }
return 0;
}

int SPADecoder(float LLR[], int (*h)[2], float LLR_ret[], float L_ch[],  float L_dec[], int y[],int x[])  //SUb- FUNCTION CALL
{

{
    double temp;
    int i,j,k,z;
    for(i=0;i<ROWS_P;i++)
    {
        temp=1;
        for(j=0;j<ROWS_P;j++)
        {
            if(j!=i && h[j][0]==h[i][0])
            {
                temp=temp * tanf(LLR[j]/2);
            }
        }
        LLR_ret[i] = log((1 + temp)/(1 - temp));

        if(LLR_ret[i] > 40)
        {
            LLR_ret[i]=40;
        }
        else if(LLR_ret[i]<-40)
        {
            LLR_ret[i]=-40;
        }
    }

    for(i=0;i<COL;i++)
    {
        L_dec[i]=L_ch[i];
    }

    for(i=1;i<COL+1;i++)
    {
        for(j=0;j<ROWS_P;j++)
        {
            if(h[j][1]==i)
            {
                L_dec[i-1]=L_dec[i-1]+LLR_ret[j];
            }
        }

        if(L_dec[i-1]<=0)
        {
            y[i-1]=1;
        }
        else
        {
            y[i-1]=0;
        }
    }
    z=codecheck(h,y);                  // Function Call
    if(z==1)                               
    {
        return z;
    }
    for(i=0;i<ROWS_P;i++)
    {
        temp=0;
        for(j=0;j<ROWS_P;j++)
        {
            if(j!=i && h[j][1]==h[i][1])
            {
                temp=temp + LLR_ret[j];
                k=h[i][1];
            }
        }
        LLR[i] = k+L_ch[k-1];
    }
    return z;
}

VOID Top_FUNCTION (int z, int din[COL], int dout[COL])   //TOP-Function

{
   ...............

................

    z= codecheck(h,x);
   // printf("z value=%d \n",z);


    for (j = 0; j< COL; j++)
    {
        if (x[j]==1)
        {
            L_ch[j]=logf(a/(1-a));
        }
        else
        {
          L_ch[j]=logf((1-a)/a);
        }

    }
    for(snr_count=0;snr_count<1;snr_count++)
        {
             InitializeChannelLLR(noOfSymbols, x,  L_ch, h, LLR);
                for(looping=0;looping<decoderIterations;looping++)
                        {
                           z=SPADecoder(LLR, h, LLR_ret, L_ch, L_dec, y,x);
                        }

        }
    //printf("Decoded Codeword \n");
    for (i = 0; i < COL; i++)
    {
     dout[i]=y[i];
    // printf("%d", dout[i]);
    }
    //printf("\n");
//return 0;
}

 

 

Starting C synthesis ...
C:/Xilinx_2015_4/Vivado_HLS/2015.4/bin/vivado_hls.bat E:/Saraswathy/LDPC_Project/Decoder_Hls/SPA_Decoder/solution1/csynth.tcl
@I [HLS-10] Running 'C:/Xilinx_2015_4/Vivado_HLS/2015.4/bin/unwrapped/win64.o/vivado_hls.exe'
            for user 'Optics2015A' on host 'optics2015a-pc' (Windows NT_amd64 version 6.1) on Mon Sep 18 12:00:45 +0530 2017
            in directory 'E:/Saraswathy/LDPC_Project/Decoder_Hls'
@I [HLS-10] Opening project 'E:/Saraswathy/LDPC_Project/Decoder_Hls/SPA_Decoder'.
@I [HLS-10] Adding design file 'SPA_decoder.c' to the project
@I [HLS-10] Opening solution 'E:/Saraswathy/LDPC_Project/Decoder_Hls/SPA_Decoder/solution1'.
@I [SYN-201] Setting up clock 'default' with a period of 10ns.
@I [HLS-10] Setting target device to 'xc7k325tffg900-2'
@I [HLS-10] Analyzing design file 'SPA_decoder.c' ...
@I [HLS-10] Validating synthesis directives ...
@I [HLS-10] Starting code transformations ...
@I [XFORM-603] Inlining function 'ap_fixed_base<49, 0, false, (ap_q_mode)5, (ap_o_mode)3, 0>::operator<<' into 'hls::hotbm::range_redux_payne_hanek_hotbm<20, float, 31, 31>' (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/hls_hotbm.h:284).
@I [XFORM-603] Inlining function 'ap_fixed_base<31, 0, false, (ap_q_mode)0, (ap_o_mode)3, 0>::quantization_adjust' into 'ap_fixed_base<31, 0, false, (ap_q_mode)0, (ap_o_mode)3, 0>::ap_fixed_base<49, 0, false, (ap_q_mode)5, (ap_o_mode)3, 0>' ().
@I [XFORM-603] Inlining function 'ap_fixed_base<31, 0, false, (ap_q_mode)5, (ap_o_mode)3, 0>::operator<<' into 'hls::hotbm::range_redux_payne_hanek_hotbm<20, float, 31, 31>' (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/hls_hotbm.h:287).
@I [XFORM-603] Inlining function 'ap_fixed_base<31, 1, true, (ap_q_mode)5, (ap_o_mode)3, 0>::operator<<' into 'hls::hotbm::my_to_float<31, 1>' (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/hls_hotbm.h:156).
@I [HLS-10] Checking synthesizability ...
@I [XFORM-602] Inlining function 'fp_struct<float>::expv' into 'hls::hotbm::range_redux_payne_hanek_hotbm<20, float, 31, 31>' (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/hls_hotbm.h:224) automatically.
@I [XFORM-602] Inlining function 'hls::table_lookup_4oPi<23, 20>' into 'hls::hotbm::range_redux_payne_hanek_hotbm<20, float, 31, 31>' (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/hls_hotbm.h:249) automatically.
@I [XFORM-602] Inlining function 'hls::big_mult<71, 24>' into 'hls::hotbm::range_redux_payne_hanek_hotbm<20, float, 31, 31>' (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/hls_hotbm.h:251) automatically.
@I [XFORM-602] Inlining function 'hls::hotbm::clz<18, 49, 0>' into 'hls::hotbm::range_redux_payne_hanek_hotbm<20, float, 31, 31>' (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/hls_hotbm.h:277) automatically.
@I [XFORM-602] Inlining function 'fp_struct<float>::data' into 'fp_struct<float>::to_float' (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/utils/x_hls_utils.h:347) automatically.
@I [XFORM-602] Inlining function 'fp_struct<float>::to_float' into 'fp_struct<float>::to_ieee' (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/utils/x_hls_utils.h:368) automatically.
@I [XFORM-602] Inlining function 'fp_struct<float>::set_mantissa' into 'hls::hotbm::my_to_float<31, 1>' (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/hls_hotbm.h:169) automatically.
@I [XFORM-602] Inlining function 'fp_struct<float>::to_ieee' into 'hls::hotbm::my_to_float<31, 1>' (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/hls_hotbm.h:173) automatically.
@I [XFORM-602] Inlining function 'fp_struct<float>::to_ieee' into 'hls::copysignf' (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls_math.h:264) automatically.
@I [XFORM-602] Inlining function 'fp_struct<double>::data' into 'fp_struct<double>::to_double' (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/utils/x_hls_utils.h:506) automatically.
@I [XFORM-602] Inlining function 'fp_struct<double>::to_double' into 'fp_struct<double>::to_ieee' (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/utils/x_hls_utils.h:520) automatically.
@I [XFORM-602] Inlining function 'fp_struct<double>::to_ieee' into 'hls::nan' (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls_math.h:80) automatically.
@I [XFORM-602] Inlining function 'hls::copysignf' into 'hls::hotbm::sincosf' (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/hls_hotbm.h:516) automatically.
@I [XFORM-602] Inlining function 'hls::__isinf' into 'hls::hotbm::sincosf' (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/hls_hotbm.h:518) automatically.
@I [XFORM-602] Inlining function 'hls::__isnan' into 'hls::hotbm::sincosf' (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/hls_hotbm.h:518) automatically.
@I [XFORM-602] Inlining function 'hls::nan' into 'hls::hotbm::sincosf' (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/hls_hotbm.h:519) automatically.
@I [XFORM-602] Inlining function 'fp_struct<float>::to_ieee' into 'hls::hotbm::sincosf' (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/hls_hotbm.h:523) automatically.
@I [XFORM-602] Inlining function 'hls::sincosf' into 'hls::tanf' (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls_math.h:692) automatically.
@I [XFORM-602] Inlining function 'hls::tanf' into 'tanf' (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/lib_hlsm.cpp:106) automatically.
@I [XFORM-602] Inlining function 'tanf' into 'SPADecoder' (SPA_decoder.c:72) automatically.
@I [XFORM-602] Inlining function 'InitializeChannelLLR' into 'SPA_Decoder' (SPA_decoder.c:173) automatically.
@W [SYNCHK-23] r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/hls_hotbm.h:135: variable-indexed range selection may cause suboptimal QoR.
@I [SYNCHK-10] 0 error(s), 1 warning(s).
@I [XFORM-502] Unrolling small iteration loop 'Loop-1' (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/hls_hotbm.h:133) in function 'hls::hotbm::my_to_float<31, 1>' automatically.
@I [XFORM-501] Unrolling loop 'Loop-1' (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/hls_hotbm.h:133) in function 'hls::hotbm::my_to_float<31, 1>' completely.
@I [XFORM-102] Partitioning array 'h' in dimension 2 automatically.
@I [XFORM-102] Automatically partitioning small array 'out_bits.V' (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/hls_hotbm.h:132) completely based on array size.
@I [XFORM-102] Automatically partitioning small array 'c' (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/hls_hotbm.h:145) completely based on array size.
@I [XFORM-101] Partitioning array 'swap_table'  in dimension 1 completely.
@I [XFORM-101] Partitioning array 'neg_sin_table'  in dimension 1 completely.
@I [XFORM-101] Partitioning array 'neg_cos_table'  in dimension 1 completely.
@I [XFORM-101] Partitioning array 'out_bits.V' (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/hls_hotbm.h:132) in dimension 1 completely.
@I [XFORM-101] Partitioning array 'c' (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/hls_hotbm.h:145) in dimension 1 completely.
@I [XFORM-602] Inlining function 'fp_struct<float>::expv' into 'hls::hotbm::range_redux_payne_hanek_hotbm<20, float, 31, 31>' (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/hls_hotbm.h:224) automatically.
@I [XFORM-602] Inlining function 'hls::table_lookup_4oPi<23, 20>' into 'hls::hotbm::range_redux_payne_hanek_hotbm<20, float, 31, 31>' (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/hls_hotbm.h:249) automatically.
@I [XFORM-602] Inlining function 'hls::big_mult<71, 24>' into 'hls::hotbm::range_redux_payne_hanek_hotbm<20, float, 31, 31>' (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/hls_hotbm.h:251) automatically.
@I [XFORM-602] Inlining function 'hls::hotbm::clz<18, 49, 0>' into 'hls::hotbm::range_redux_payne_hanek_hotbm<20, float, 31, 31>' (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/hls_hotbm.h:277) automatically.
@I [XFORM-602] Inlining function 'fp_struct<float>::data' into 'fp_struct<float>::to_float' (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/utils/x_hls_utils.h:347) automatically.
@I [XFORM-602] Inlining function 'fp_struct<float>::to_float' into 'fp_struct<float>::to_ieee' (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/utils/x_hls_utils.h:368) automatically.
@I [XFORM-602] Inlining function 'fp_struct<float>::set_mantissa' into 'hls::hotbm::my_to_float<31, 1>' (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/hls_hotbm.h:169) automatically.
@I [XFORM-602] Inlining function 'fp_struct<float>::to_ieee' into 'hls::hotbm::my_to_float<31, 1>' (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/hls_hotbm.h:173) automatically.
@I [XFORM-602] Inlining function 'fp_struct<float>::to_ieee' into 'hls::copysignf' (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls_math.h:264) automatically.
@I [XFORM-602] Inlining function 'fp_struct<double>::data' into 'fp_struct<double>::to_double' (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/utils/x_hls_utils.h:506) automatically.
@I [XFORM-602] Inlining function 'fp_struct<double>::to_double' into 'fp_struct<double>::to_ieee' (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/utils/x_hls_utils.h:520) automatically.
@I [XFORM-602] Inlining function 'fp_struct<double>::to_ieee' into 'hls::nan' (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls_math.h:80) automatically.
@I [XFORM-602] Inlining function 'hls::copysignf' into 'hls::hotbm::sincosf' (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/hls_hotbm.h:516) automatically.
@I [XFORM-602] Inlining function 'hls::__isinf' into 'hls::hotbm::sincosf' (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/hls_hotbm.h:518) automatically.
@I [XFORM-602] Inlining function 'hls::__isnan' into 'hls::hotbm::sincosf' (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/hls_hotbm.h:518) automatically.
@I [XFORM-602] Inlining function 'hls::nan' into 'hls::hotbm::sincosf' (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/hls_hotbm.h:519) automatically.
@I [XFORM-602] Inlining function 'fp_struct<float>::to_ieee' into 'hls::hotbm::sincosf' (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/hls_hotbm.h:523) automatically.
@I [XFORM-602] Inlining function 'hls::sincosf' into 'hls::tanf' (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls_math.h:692) automatically.
@I [XFORM-602] Inlining function 'hls::tanf' into 'tanf' (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/lib_hlsm.cpp:106) automatically.
@I [XFORM-602] Inlining function 'tanf' into 'SPADecoder' (SPA_decoder.c:72) automatically.
@I [XFORM-602] Inlining function 'InitializeChannelLLR' into 'SPA_Decoder' (SPA_decoder.c:173) automatically.
@I [XFORM-401] Performing if-conversion on hyperblock from (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/hls_hotbm.h:418:11) to (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/hls_hotbm.h:532:1) in function 'hls::hotbm::sincosf'... converting 7 basic blocks.
@I [XFORM-401] Performing if-conversion on hyperblock from (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/hls_hotbm.h:215:7) to (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/hls_hotbm.h:297:1) in function 'hls::hotbm::range_redux_payne_hanek_hotbm<20, float, 31, 31>'... converting 8 basic blocks.
@I [XFORM-401] Performing if-conversion on hyperblock to (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/hls_hotbm.h:157:9) in function 'hls::hotbm::my_to_float<31, 1>'... converting 4 basic blocks.
@I [XFORM-401] Performing if-conversion on hyperblock from (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/hls_hotbm.h:164:30) to (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/hls_hotbm.h:174:1) in function 'hls::hotbm::my_to_float<31, 1>'... converting 3 basic blocks.
@I [XFORM-401] Performing if-conversion on hyperblock from (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/hls_big_mult.h:261:51) to (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/hls_big_mult.h:260:24) in function 'hls::big_mult_v3small<71, 24, 17>'... converting 3 basic blocks.
@I [XFORM-401] Performing if-conversion on hyperblock from (SPA_decoder.c:159:10) to (SPA_decoder.c:171:9) in function 'SPA_Decoder'... converting 2 basic blocks.
@I [XFORM-401] Performing if-conversion on hyperblock from (SPA_decoder.c:121:13) to (SPA_decoder.c:119:24) in function 'SPADecoder'... converting 4 basic blocks.
@I [XFORM-602] Inlining function 'hls::hotbm::range_redux_payne_hanek_hotbm<20, float, 31, 31>' into 'hls::hotbm::sincosf' (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/hls_hotbm.h:456) automatically.
@W [XFORM-631] Renaming function 'hls::hotbm::sincosf' (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/hls_hotbm.h:418) into sincosf.
@W [XFORM-631] Renaming function 'hls::hotbm::my_to_float<31, 1>' (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/hls_hotbm.h:118) into my_to_float<31, 1>.
@W [XFORM-631] Renaming function 'hls::big_mult_v3small<71, 24, 17>' (r:/scratch/builds/2015.4/nightly/2015_11_17_1412220/src/products/hls/hls_lib/src/hls/hls_big_mult.h:258:26) into big_mult_v3small<71, 24, 17>.
@I [HLS-111] Elapsed time: 49.779 seconds; current memory usage: 568 MB.
@I [HLS-10] Starting hardware synthesis ...
@I [HLS-10] Synthesizing 'SPA_Decoder' ...
@W [SYN-103] Legalizing function name 'SPA_Decoder_big_mult_v3small<71, 24, 17>' to 'SPA_Decoder_big_mult_v3small_71_24_17_s'.
@W [SYN-103] Legalizing function name 'SPA_Decoder_my_to_float<31, 1>' to 'SPA_Decoder_my_to_float_31_1_s'.
@I [HLS-10] ----------------------------------------------------------------
@I [HLS-10] -- Scheduling module 'SPA_Decoder_big_mult_v3small_71_24_17_s'
@I [HLS-10] ----------------------------------------------------------------
@I [SCHED-11] Starting scheduling ...
@I [SCHED-11] Finished scheduling.
@I [HLS-111] Elapsed time: 2.356 seconds; current memory usage: 568 MB.
@I [HLS-10] ----------------------------------------------------------------
@I [HLS-10] -- Exploring micro-architecture for module 'SPA_Decoder_big_mult_v3small_71_24_17_s'
@I [HLS-10] ----------------------------------------------------------------
@I [BIND-100] Starting micro-architecture generation ...
@I [BIND-101] Performing variable lifetime analysis.
@I [BIND-101] Exploring resource sharing.
@I [BIND-101] Binding ...
@I [BIND-100] Finished micro-architecture generation.
@I [HLS-111] Elapsed time: 1.123 seconds; current memory usage: 568 MB.
@I [HLS-10] ----------------------------------------------------------------
@I [HLS-10] -- Scheduling module 'SPA_Decoder_my_to_float_31_1_s'
@I [HLS-10] ----------------------------------------------------------------
@I [SCHED-11] Starting scheduling ...
@I [SCHED-11] Finished scheduling.
@I [HLS-111] Elapsed time: 0.281 seconds; current memory usage: 568 MB.
@I [HLS-10] ----------------------------------------------------------------
@I [HLS-10] -- Exploring micro-architecture for module 'SPA_Decoder_my_to_float_31_1_s'
@I [HLS-10] ----------------------------------------------------------------
@I [BIND-100] Starting micro-architecture generation ...
@I [BIND-101] Performing variable lifetime analysis.
@I [BIND-101] Exploring resource sharing.
@I [BIND-101] Binding ...
@I [BIND-100] Finished micro-architecture generation.
@I [HLS-111] Elapsed time: 0.452 seconds; current memory usage: 568 MB.
@I [HLS-10] ----------------------------------------------------------------
@I [HLS-10] -- Scheduling module 'SPA_Decoder_sincosf'
@I [HLS-10] ----------------------------------------------------------------
@I [SCHED-11] Starting scheduling ...
@I [SCHED-11] Finished scheduling.
@I [HLS-111] Elapsed time: 0.406 seconds; current memory usage: 568 MB.
@I [HLS-10] ----------------------------------------------------------------
@I [HLS-10] -- Exploring micro-architecture for module 'SPA_Decoder_sincosf'
@I [HLS-10] ----------------------------------------------------------------
@I [BIND-100] Starting micro-architecture generation ...
@I [BIND-101] Performing variable lifetime analysis.
@I [BIND-101] Exploring resource sharing.
@I [BIND-101] Binding ...
@I [BIND-100] Finished micro-architecture generation.
@I [HLS-111] Elapsed time: 1.03 seconds; current memory usage: 568 MB.
@I [HLS-10] ----------------------------------------------------------------
@I [HLS-10] -- Scheduling module 'SPA_Decoder_codecheck'
@I [HLS-10] ----------------------------------------------------------------
@I [SCHED-11] Starting scheduling ...
@I [SCHED-11] Finished scheduling.
@I [HLS-111] Elapsed time: 0.296 seconds; current memory usage: 568 MB.
@I [HLS-10] ----------------------------------------------------------------
@I [HLS-10] -- Exploring micro-architecture for module 'SPA_Decoder_codecheck'
@I [HLS-10] ----------------------------------------------------------------
@I [BIND-100] Starting micro-architecture generation ...
@I [BIND-101] Performing variable lifetime analysis.
@I [BIND-101] Exploring resource sharing.
@I [BIND-101] Binding ...
@I [BIND-100] Finished micro-architecture generation.
@I [HLS-111] Elapsed time: 0.379 seconds; current memory usage: 568 MB.
@I [HLS-10] ----------------------------------------------------------------
@I [HLS-10] -- Scheduling module 'SPA_Decoder_SPADecoder'
@I [HLS-10] ----------------------------------------------------------------
@I [SCHED-11] Starting scheduling ...
@I [SCHED-11] Finished scheduling.
@I [HLS-111] Elapsed time: 0.297 seconds; current memory usage: 569 MB.
@I [HLS-10] ----------------------------------------------------------------
@I [HLS-10] -- Exploring micro-architecture for module 'SPA_Decoder_SPADecoder'
@I [HLS-10] ----------------------------------------------------------------
@I [BIND-100] Starting micro-architecture generation ...
@I [BIND-101] Performing variable lifetime analysis.
@I [BIND-101] Exploring resource sharing.
@I [BIND-101] Binding ...
@I [BIND-100] Finished micro-architecture generation.
@I [HLS-111] Elapsed time: 0.827 seconds; current memory usage: 569 MB.
@I [HLS-10] ----------------------------------------------------------------
@I [HLS-10] -- Scheduling module 'SPA_Decoder'
@I [HLS-10] ----------------------------------------------------------------
@I [SCHED-11] Starting scheduling ...
@I [SCHED-11] Finished scheduling.
@I [HLS-111] Elapsed time: 0.39 seconds; current memory usage: 570 MB.
@I [HLS-10] ----------------------------------------------------------------
@I [HLS-10] -- Exploring micro-architecture for module 'SPA_Decoder'
@I [HLS-10] ----------------------------------------------------------------
@I [BIND-100] Starting micro-architecture generation ...
@I [BIND-101] Performing variable lifetime analysis.
@I [BIND-101] Exploring resource sharing.
@I [BIND-101] Binding ...
@I [BIND-100] Finished micro-architecture generation.
@I [HLS-111] Elapsed time: 0.514 seconds; current memory usage: 570 MB.
@I [HLS-10] ----------------------------------------------------------------
@I [HLS-10] -- Generating RTL for module 'SPA_Decoder_big_mult_v3small_71_24_17_s'
@I [HLS-10] ----------------------------------------------------------------
@I [RTGEN-100] Generating core module 'SPA_Decoder_mul_41s_24ns_41_3': 1 instance(s).
@I [RTGEN-100] Finished creating RTL model for 'SPA_Decoder_big_mult_v3small_71_24_17_s'.
@I [HLS-111] Elapsed time: 0.89 seconds; current memory usage: 570 MB.
@I [HLS-10] ----------------------------------------------------------------
@I [HLS-10] -- Generating RTL for module 'SPA_Decoder_my_to_float_31_1_s'
@I [HLS-10] ----------------------------------------------------------------
@I [RTGEN-100] Finished creating RTL model for 'SPA_Decoder_my_to_float_31_1_s'.
@I [HLS-111] Elapsed time: 0.78 seconds; current memory usage: 571 MB.
@I [HLS-10] ----------------------------------------------------------------
@I [HLS-10] -- Generating RTL for module 'SPA_Decoder_sincosf'
@I [HLS-10] ----------------------------------------------------------------
@I [RTGEN-100] Generating core module 'SPA_Decoder_mul_30ns_31ns_61_3': 1 instance(s).
@I [RTGEN-100] Generating core module 'SPA_Decoder_mul_mul_17ns_13s_30_1': 1 instance(s).
@I [RTGEN-100] Generating core module 'SPA_Decoder_mul_mul_17ns_14ns_31_1': 1 instance(s).
@I [RTGEN-100] Generating core module 'SPA_Decoder_mul_mul_21s_17ns_38_1': 1 instance(s).
@I [RTGEN-100] Generating core module 'SPA_Decoder_mul_mul_22ns_17ns_39_1': 1 instance(s).
@I [RTGEN-100] Generating core module 'SPA_Decoder_mux_16to1_sel4_1_1': 2 instance(s).
@I [RTGEN-100] Generating core module 'SPA_Decoder_mux_8to1_sel3_1_1': 1 instance(s).
@I [RTGEN-100] Finished creating RTL model for 'SPA_Decoder_sincosf'.
@I [HLS-111] Elapsed time: 0.561 seconds; current memory usage: 572 MB.
@I [HLS-10] ----------------------------------------------------------------
@I [HLS-10] -- Generating RTL for module 'SPA_Decoder_codecheck'
@I [HLS-10] ----------------------------------------------------------------
@I [RTGEN-100] Finished creating RTL model for 'SPA_Decoder_codecheck'.
@I [HLS-111] Elapsed time: 0.858 seconds; current memory usage: 574 MB.
@I [HLS-10] ----------------------------------------------------------------
@I [HLS-10] -- Generating RTL for module 'SPA_Decoder_SPADecoder'
@I [HLS-10] ----------------------------------------------------------------
@I [RTGEN-100] Generating core module 'SPA_Decoder_dadd_64ns_64ns_64_5_full_dsp': 1 instance(s).
@I [RTGEN-100] Generating core module 'SPA_Decoder_ddiv_64ns_64ns_64_17': 1 instance(s).
@I [RTGEN-100] Generating core module 'SPA_Decoder_dlog_64ns_64ns_64_16_full_dsp': 1 instance(s).
@I [RTGEN-100] Generating core module 'SPA_Decoder_dmul_64ns_64ns_64_5_max_dsp': 1 instance(s).
@I [RTGEN-100] Generating core module 'SPA_Decoder_dsub_64ns_64ns_64_5_full_dsp': 1 instance(s).
@I [RTGEN-100] Generating core module 'SPA_Decoder_fadd_32ns_32ns_32_4_full_dsp': 1 instance(s).
@I [RTGEN-100] Generating core module 'SPA_Decoder_fcmp_32ns_32ns_1_1': 2 instance(s).
@I [RTGEN-100] Generating core module 'SPA_Decoder_fdiv_32ns_32ns_32_8': 1 instance(s).
@I [RTGEN-100] Generating core module 'SPA_Decoder_fmul_32ns_32ns_32_2_max_dsp': 1 instance(s).
@I [RTGEN-100] Generating core module 'SPA_Decoder_fpext_32ns_64_1': 1 instance(s).
@I [RTGEN-100] Generating core module 'SPA_Decoder_fptrunc_64ns_32_1': 1 instance(s).
@I [RTGEN-100] Finished creating RTL model for 'SPA_Decoder_SPADecoder'.
@I [HLS-111] Elapsed time: 0.421 seconds; current memory usage: 575 MB.
@I [HLS-10] ----------------------------------------------------------------
@I [HLS-10] -- Generating RTL for module 'SPA_Decoder'
@I [HLS-10] ----------------------------------------------------------------
@I [RTGEN-500] Setting interface mode on port 'SPA_Decoder/z' to 'ap_none'.
@I [RTGEN-500] Setting interface mode on port 'SPA_Decoder/din' to 'ap_memory'.
@I [RTGEN-500] Setting interface mode on port 'SPA_Decoder/dout' to 'ap_memory'.
@I [RTGEN-500] Setting interface mode on function 'SPA_Decoder' to 'ap_ctrl_hs'.
@W [RTGEN-101] Port 'SPA_Decoder/z' has no fanin or fanout and is left dangling.
               Please use C simulation to confirm this function argument can be read from or written to.
@I [RTGEN-100] Finished creating RTL model for 'SPA_Decoder'.

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Advisor
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The only one of those that actually matters is this:

 

@W [RTGEN-101] Port 'SPA_Decoder/z' has no fanin or fanout and is left dangling.
               Please use C simulation to confirm this function argument can be read from or written to.

That's just because you never read from "z", and you can't write to it because it's passed by value. If you intend to write to it, pass it by reference instead.

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Explorer
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Hi,

 

Can you check whether arguments/variables passing between main and sub functions in the Source codes are right or wrong. Please help me, i am getting confusion in function call.

 

I am taking "dout" as output.

 

void SPA_Decoder(int z, int din[COL], int dout[COL])     //Top_function

 

{.

...int x[]   ///I am taking "x" as INPUT

... InitializeChannelLLR(noOfSymbols, x,  L_ch, h, LLR);
                for(looping=0;looping<decoderIterations;looping++)
                        {
                           z=SPADecoder(LLR, h, LLR_ret, L_ch, L_dec, y,x);
                        }.

}

 

int SPADecoder(float LLR[], int (*h)[2], float LLR_ret[], float L_ch[],  float L_dec[], int y[],int x[]) SUB FUNCTION

{

.........

.........

.... z=codecheck(h,y);

.......

........

 

}

 

int InitializeChannelLLR (int noOfSymbols, int x[], float L_ch[],int (*h)[2], float LLR[])  ///SUB FUNCTION

{

...........

...........

...........

}

 

int codecheck(int (*h)[2],int x[])   ///SUB FUNCTION

{

........

..........

}

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I can see two potential problems:

 

(1) codecheck is expecting h and x as arguments, but you're passing h and y. That may be intentional (it's perfectly valid C) but it might be confusing - or it might be a mistake.

 

(2) As above, "z" is accepted as an input, but then you overwrite it. It's not clear what purpose "z" has since you haven't described it as either an input or an output.

 

Apart from that, it looks OK.

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Teacher
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@thaus_015 one thing I would very strongly suggest is to run c simulations before you try to synthesize anything. If you have proper functionality you won't see many of the issues. Most of the issues you are seeing can be (need to be) fixed during c simulations.

- Please mark the Answer as "Accept as solution" if information provided is helpful.
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Hi,

 

Thanks for your response.  I am getting a warning message. How to get rid-off that warning message.

 

@I [RTGEN-500] Setting interface mode on port 'SPA_Decoder/z' to 'ap_none'.
@I [RTGEN-500] Setting interface mode on port 'SPA_Decoder/din' to 'ap_memory'.
@I [RTGEN-500] Setting interface mode on port 'SPA_Decoder/dout' to 'ap_memory'.
@I [RTGEN-500] Setting interface mode on function 'SPA_Decoder' to 'ap_ctrl_hs'.
@W [RTGEN-101] Port 'SPA_Decoder/z' has no fanin or fanout and is left dangling.
               Please use C simulation to confirm this function argument can be read from or written to.
@I [RTGEN-100] Finished creating RTL model for 'SPA_Decoder'.
@I [HLS-111] Elapsed time: 0.842 seconds; current memory usage: 98.7 MB.
@I [RTMG-279] Implementing memory 'SPA_Decoder_codecheck_h_0_rom' using auto ROMs.
@I [RTMG-278] Implementing memory 'SPA_Decoder_codecheck_y_ram' using block RAMs.
@I [RTMG-279] Implementing memory 'SPA_Decoder_SPADecoder_L_ch_rom' using auto ROMs.
@I [RTMG-279] Implementing memory 'SPA_Decoder_SPADecoder_h_1_rom' using auto ROMs.
@I [RTMG-279] Implementing memory 'SPA_Decoder_x_rom' using distributed ROMs.
@I [RTMG-278] Implementing memory 'SPA_Decoder_y_ram' using distributed RAMs.
@I [RTMG-278] Implementing memory 'SPA_Decoder_L_dec_ram' using block RAMs.
@I [RTMG-278] Implementing memory 'SPA_Decoder_LLR_ram' using block RAMs.

Decoder_Synthe.PNG
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Hi,

 

(1) codecheck is expecting h and x as arguments, but you're passing h and y. That may be intentional (it's perfectly valid C) but it might be confusing - or it might be a mistake.

 

Answer:No mistake, Codecheck Arguments are h and x only, but i am passing h and y into SPADecoder function. Results are right.

 

(2) As above, "z" is accepted as an input, but then you overwrite it. It's not clear what purpose "z" has since you haven't described it as either an input or an output.

 

"z" variable acts decision maker.

 

inside main function // TOP FUNCTIOn

{

 if(z==1)                                            // if decoded correctly BER for that codeword is zero
                          {

                              printf("\t\ndecoded correctly\n");

                          }
                         else                                                 // if not decoded properly calulating the BER
                          {
                               printf("decoded incorrectly \n");
                          }

 

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@thaus_015 are you simulating this design? Is the behavior of Z what you want? The code doesn't make sense as it is written. Make sure that your code works properly in C simulation first. 

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I am not doing simulation in VIVADO HLS only synthesis. But the codes are checked and compiler in C compiler. Its working fine and got result.

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Hi,

 

I have simulated the design through TEST bench. I am getting correct result in HLS Console. Then after i created HLS IP and generated bitstreams.

 

ISSUES: In XSDK, While compiling the HLS IP design, I am getting incorrect result. Please guide me how to make codes in XSDK to Call HLS IP>

 

XSDK SOURCE CODE:

 

nt main()
{
init_platform();
 //u32 *Results;
 int m,l;

 int outdata[6];
 //int *ai = (int *)(outdata);
 XSpa_decoder LDPC;
 XSpa_decoder  *LDPCPTR=&LDPC;
 XSpa_decoder_Initialize(LDPCPTR,XPAR_SPA_DECODER_0_DEVICE_ID);

 XSpa_decoder_EnableAutoRestart(LDPCPTR);
 print("\r\n---LDPC FOR HW---\r\n");

XSpa_decoder_Start(LDPCPTR);

printf("\n Encoder Codeword:\n");

//while (!XSpa_decoder_IsDone(LDPCPTR));
    for(m=0;m<6;m++)
       {

        XSpa_decoder_Write_dout_Words(LDPCPTR, 0, outdata, 6);
         xil_printf("%d", outdata[m]);
      }

    cleanup_platform();
       return 0;
    }

 

/************************** Function Prototypes *****************************/
#ifndef __linux__
int XSpa_decoder_Initialize(XSpa_decoder *InstancePtr, u16 DeviceId);
XSpa_decoder_Config* XSpa_decoder_LookupConfig(u16 DeviceId);
int XSpa_decoder_CfgInitialize(XSpa_decoder *InstancePtr, XSpa_decoder_Config *ConfigPtr);
#else
int XSpa_decoder_Initialize(XSpa_decoder *InstancePtr, const char* InstanceName);
int XSpa_decoder_Release(XSpa_decoder *InstancePtr);
#endif

void XSpa_decoder_Start(XSpa_decoder *InstancePtr);
u32 XSpa_decoder_IsDone(XSpa_decoder *InstancePtr);
u32 XSpa_decoder_IsIdle(XSpa_decoder *InstancePtr);
u32 XSpa_decoder_IsReady(XSpa_decoder *InstancePtr);
void XSpa_decoder_EnableAutoRestart(XSpa_decoder *InstancePtr);
void XSpa_decoder_DisableAutoRestart(XSpa_decoder *InstancePtr);

u32 XSpa_decoder_Get_dout_BaseAddress(XSpa_decoder *InstancePtr);
u32 XSpa_decoder_Get_dout_HighAddress(XSpa_decoder *InstancePtr);
u32 XSpa_decoder_Get_dout_TotalBytes(XSpa_decoder *InstancePtr);
u32 XSpa_decoder_Get_dout_BitWidth(XSpa_decoder *InstancePtr);
u32 XSpa_decoder_Get_dout_Depth(XSpa_decoder *InstancePtr);
u32 XSpa_decoder_Write_dout_Words(XSpa_decoder *InstancePtr, int offset, int *data, int length);
u32 XSpa_decoder_Read_dout_Words(XSpa_decoder *InstancePtr, int offset, int *data, int length);
u32 XSpa_decoder_Write_dout_Bytes(XSpa_decoder *InstancePtr, int offset, char *data, int length);
u32 XSpa_decoder_Read_dout_Bytes(XSpa_decoder *InstancePtr, int offset, char *data, int length);

void XSpa_decoder_InterruptGlobalEnable(XSpa_decoder *InstancePtr);
void XSpa_decoder_InterruptGlobalDisable(XSpa_decoder *InstancePtr);
void XSpa_decoder_InterruptEnable(XSpa_decoder *InstancePtr, u32 Mask);
void XSpa_decoder_InterruptDisable(XSpa_decoder *InstancePtr, u32 Mask);
void XSpa_decoder_InterruptClear(XSpa_decoder *InstancePtr, u32 Mask);
u32 XSpa_decoder_InterruptGetEnabled(XSpa_decoder *InstancePtr);
u32 XSpa_decoder_InterruptGetStatus(XSpa_decoder *InstancePtr);

#ifdef __cplusplus
}
#endif

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Hi,

 

I am also working on a code where I have two functions. The value calculated from one function is used by the other function to give the final output. The two functions are :

void cinit(int ibar_ssb, int ncellid, int cinit_calc);

void seq(int cinit_cal,int c[288],float *sym_1,float *sym_2);

I want to use the cinit_calc value calculated from the 'cinit' function to be passed to the 'seq' function, but 'seq' function is taking cinit_calc as zero whereas the cinit function is correctly generating the value of cinit_calc. Can you please help me  with this?

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Teacher
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this is a 3 year old thread so pls open new ones in the future.

in your specific case, cinit is not returning a value (its return type is void) and it seems you are using init_calc as output but you're taking this as value not a pointer or a reference. The easiest is to make it a reference in cinit.

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