11-07-2017 10:12 PM
I want to make my program to run faster. So i need to apply clock period to all functions in the design. What is procedure to follow ?
I have followed UG902 but i am not clear. Please explain me with examples.
11-07-2017 10:36 PM
For C and C++ designs, only a single clock is supported. For SystemC designs, multiple named clocks can be created and applied to different SC_MODULEs using the set_directive_clock command
For the C/C++ designs, if you connect the slow clock domain to the VHLS IP the tools should introduce the necessary circuits for clock rate conversion in the axi interconnect. .
11-07-2017 11:06 PM
Shall i use below syntax directly into C code
#pragma HLS clock domain=slow_clock.
How can i add the pragma directives into C codes. I am beginner to HLS please explain me step by step. It will be usable to me.
11-07-2017 11:12 PM
11-07-2017 11:25 PM
Yes, i seen already.
I have program in C codes
Whether i need to give these commands in TCL window,
create_clock -period 15 fast_clk
create_clock -period 60 slow_clk
or else i need to give, pragma command inside the function of C codes.
11-08-2017 12:13 AM
11-08-2017 02:01 AM
The create_clock will be useful only if you are using SystemC.
If you are using C/C++, you can speed up the modules by using PIPELINE/LATENCY directives on those particular modules.
Refer this link for syntax of PIPELINE/LATENCY pragmas: https://www.xilinx.com/support/documentation/sw_manuals/xilinx2017_3/ug902-vivado-high-level-synthesis.pdf
You can also apply the directives by right-clicking the function in the Directive window on the right and clicking "Insert Directive".