cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 
kodukulav
Adventurer
Adventurer
931 Views
Registered: ‎06-16-2017

Intercepting AXI read transactions

Hi,

I want to write a simple interceptor block in HLS, which will intercept a AXI read transaction from DPU to DDR, and figure out whether that transaction is within some known address range or not. I also want to write a testbench to verify this process.

I want to eventually integrate this HLS module into SDSoC to work with reVISION stack. 

I'm not sure how to get started on this. I'd appreciate any pointers in this regard.

Thanks,

Venky

0 Kudos
4 Replies
scampbell
Moderator
Moderator
860 Views
Registered: ‎10-04-2011

Hello @kodukulav ,

HLS provides the ability to add AXI functionality on the interface to allow for the connection to AXI signaling in the larger design. However, inside the C++ code, there is unfortunately not a method to access these signals. With AXIM you can specify the base address as well as an offset via a separate port, or via the AXI Lite interface, but again, these signals are not available to the C++ logic used to create the IP. I think in this case you would need to create a wrapper that interfaces with the AXI system, then feed the AXI based signals to/from the HLS IP via dedicated ports of a ap_memory type interface. OK, I appologize this functionality you desire isn't available, but if you do have any other questions/comments please let us know.

Regards,
Scott

kodukulav
Adventurer
Adventurer
857 Views
Registered: ‎06-16-2017

Thanks @scampbell  for your response. I'll try that out and see 

0 Kudos
aoifem
Moderator
Moderator
781 Views
Registered: ‎11-21-2018

Hi @kodukulav 

Do you have any update on this? 

Regards

Aoife
Product Application Engineer - Xilinx Technical Support EMEA


**~ Got a minute? Answer our Vitis HLS survey here! ~**

**~ Don't forget to reply, give kudos, and accept as solution.~**
0 Kudos
kodukulav
Adventurer
Adventurer
765 Views
Registered: ‎06-16-2017

@aoifem @scampbell 

I'm trying to get a simple pass through logic to work. I realized that while there is m_axi, there is not s_axi. I think s_axi needs to be implemented as a ap_memory interface.

I think the pass-through is going to work. However, if I want to implement the functionality that I need, I need to access the AWADDR line in the interface. I couldn't find any similar examples. Can you help me in this regard?

0 Kudos