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Adventurer
Adventurer
6,439 Views
Registered: ‎11-04-2010

Left dangling with no fanin or fanout for single bit input signal

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Hello,

 

I am trying to implement a block which among others has a single bit signal input.

What the block is supposed to do is check until this input is changed from logic zero to logic one in order to trigger an interrupt.

 

The code that I developed for this block is as follows:

 

int input_checker(ap_uint<1> interrupt_in)
{

#pragma HLS INTERFACE  s_axilite  port=return bundle=S_AXI4_LITE


 while(interrupt_in != 1)
 {
       interrupt_buffer_in = interrupt_in;
 }

  return 1;
}

 

Unfortunately, when I run synthesis I get a warning that "interrupt_in" has no fanin or fanout and is left dangling.

By checking the synthesized design in Vivado I can validate that the "interrupt_in" port is nowhere connected internally.

 

I checked other solutions in the forum but they do not seem to offer a solution.

Are there any hints?

 

Thank you!

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Xilinx Employee
Xilinx Employee
12,269 Views
Registered: ‎05-07-2015

Re: Left dangling with no fanin or fanout for single bit input signal

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@jbcga1986

you need not use a "while" statement here. An "if" staement is more appropriate to use.

 

Use loops only if operands  of the operations/assignments inside the loop differ in each iteration of the loop.

Thanks
Bharath
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1 Reply
Highlighted
Xilinx Employee
Xilinx Employee
12,270 Views
Registered: ‎05-07-2015

Re: Left dangling with no fanin or fanout for single bit input signal

Jump to solution

@jbcga1986

you need not use a "while" statement here. An "if" staement is more appropriate to use.

 

Use loops only if operands  of the operations/assignments inside the loop differ in each iteration of the loop.

Thanks
Bharath
--------------------------------------------------​--------------------------------------------
Please mark the Answer as "Accept as solution" if information provided addresses your query/concern.
Give Kudos to a post which you think is helpful.
--------------------------------------------------​-------------------------------------------

View solution in original post