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Highlighted
9,316 Views
Registered: ‎03-12-2015

Pulse generation using HLS

As subject, I want to write c program in HLS for pulse.I do know how to write program for the same in vhdl.

I have lot of questions on HLS

1.In HLS, main() is there?

2.Should we include studio.h file?

3.how can we compile/synthesize program?

4.will HLS create VHDL/verilog file or IP?

5.If I want to create IP, what are the additional steps are required?

6.Which files do we add to vivado project to use?

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6 Replies
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Advisor
Advisor
9,264 Views
Registered: ‎04-26-2015

(1) You don't need to have a main(), except in the testbench. The top-level function can be called whatever you want, and should normally be something descriptive because it turns up in the module name as well.

 

(2) Might as well include it. It doesn't do any harm and it sometimes helps.

 

(3) You just hit the "Synthesis" button in Vivado HLS.

 

(4) It produces both VHDL and Verilog, and those can be packaged into an IP core.

 

(5) You just hit the "Export IP" button (after running synthesis), fill in the details (vendor, block description, etc).

 

(6) When you export the IP, HLS will generate a Zip file in the folder for whatever solution is active. Extract that Zip file somewhere logical (eg. "C:\Xilinx\HLS_IP_cores"), then add that folder to the Vivado IP location list. It'll find the HLS IP core and let you add it to the project.

 

 

With that said, for anything where you want exact control of timing, VHDL and Verilog will do a better job. HLS is great where you want to do a complex bit of processing (and you don't feel like writing a bunch of huge, pipelined modules). It's not good when you want to specify exactly what happens on each clock cycle.

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9,259 Views
Registered: ‎03-12-2015

I need example design (simplest) or reference documnet
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Advisor
Advisor
9,226 Views
Registered: ‎04-26-2015

UG902 is the main reference document for HLS.

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Teacher
Teacher
9,216 Views
Registered: ‎03-31-2012

If you're trying to design a finely controlled pulse (or pulse stream), HLS is probably not the best tool to use. An RTL language would be more suited for that task.
- Please mark the Answer as "Accept as solution" if information provided is helpful.
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Advisor
Advisor
9,194 Views
Registered: ‎04-26-2015

Here's the simplest example I can think of:

void pulse(volatile int * signal) {
    *signal = 1;
    *signal = 0;
}


This will probably produce a pulse with length one clock cycle. I say "probably" because HLS doesn't generally make that sort of guarantee. If HLS decides that it wants to hold the signal high for 20 clock cycles, there's not a whole lot that you can do to change that behaviour.

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Participant
Participant
5,018 Views
Registered: ‎06-08-2016

The HLS PROTOCOL directive allows a finer control on the timing of the signal and should be helpful in such scenarios, though it has its own limitations.

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