Question on connecting IPs

[martin-91x]

Hi,

currently I'm building a system consisting of multiple IPs. Each of them produces / consumes fairly large arrays (eg. images). Because debugging / synthesis / simulation is much easier and faster when working with 3 singe IPs instead of one big and complicated IP, I decided to split up.

Now I'm wondering if:

(1) What type of interface should I use in this case (currently axis)?

(2) Is there a noticeable impact on the performance compared with a solution where the functions / arrays are internaly connected by hls::stream?

[muzaffer]

@martin-91x

You have 3 options:

* save intermediate products in registers and communicate between blocks with axis

* save intermediate products in bram and communicate between blocks with axis or bram interface

* save intermediate products in dram and communicate between  blocks with m_axi on both IPs

You probably don't need to store complete images and a number of lines/rows of the image is enough for your processing. If this is the case, you can just keep these lines in brams and just stack your blocks with axis for finished product and do an axis to memory while testing so you can see the result in memory.

[martin-91x]

I've designed all my IPs in a streaming way so that I don't have to store the images. In this case, my solution (simple connection with axis) should be fine - referring to your post.

Thank you for your answer.

[u4223374 · Accepted solution]

A stream is definitely the preferred option, if your IP can handle that. Obviously if you want intermediate buffering you can either use a VDMA (for DRAM buffer) or an AXI Stream FIFO (BRAM buffer).

In terms of performance differences - I've never seen any difference. Splitting up blocks is generally good; HLS sometimes has odd problems when projects become very complex.