cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 
Highlighted
Visitor
Visitor
292 Views
Registered: ‎06-11-2020

Vitis HLS cannot invoke DSPFP32 MADD/MACC mode for Versal

Jump to solution

Versal's DSP58 architecture support single-precision floating-point mode with MUL/ADD/MADD/MACC, which can be directly instantiated in RTL code. But Vitis HLS seams could only infer FP32 MUL/ADD, the MADD/MACC can not be infered. Instead, the MADD/MACC is splited into a floating-point multiplier and an adder, which cost 2 DSP58 primitive.

In figure 1, the Vitis HLS doesn't support fmadd/fmacc operation, only fmul and fmadd supported for BIND_OP directive.

In figure 2, "d = a[k1] * b[k1] + c[k1]" is splited into one fmul and one fadd.

In figure 3, the final implementation utilization shows two DSP58 is used.

In figure 4, DSPFP32 truly support MADD and MACC mode.

1.PNG
2.PNG
3.PNG
4.PNG
0 Kudos
1 Solution

Accepted Solutions
Highlighted
Moderator
Moderator
202 Views
Registered: ‎10-04-2011

Hello Oxygen_Chu,

Unfortunately, HLS does not support the DSP58 MAC mode in the 2020.1 release. This is planned for support in the 2020.2 release of the Vitis HLS tool. 

I apologize that we don't have a better answer for that at this time, but hopefully you can continue your algorithm development until that release then.

Regards,
Scott

View solution in original post

2 Replies
Highlighted
Moderator
Moderator
203 Views
Registered: ‎10-04-2011

Hello Oxygen_Chu,

Unfortunately, HLS does not support the DSP58 MAC mode in the 2020.1 release. This is planned for support in the 2020.2 release of the Vitis HLS tool. 

I apologize that we don't have a better answer for that at this time, but hopefully you can continue your algorithm development until that release then.

Regards,
Scott

View solution in original post

Highlighted
Visitor
Visitor
160 Views
Registered: ‎06-11-2020

Thx, boy~

0 Kudos