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jerhill
Observer
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Registered: ‎07-18-2019

Vitis for Windows can't build platform for Vitis_HLS project.

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I have built a couple of simple test cases both an existing tutorial (https://forums.xilinx.com/t5/Design-and-Debug-Techniques-Blog/AXI-Basics-7-Connecting-to-the-PS-using-AXI4-Lite-and-Vitis-HLS/ba-p/1137753) and something simple of my own in Vitis_HLS (Windows 2020.2) and generated the appropriate IP connecting the block to an Ultrascale MPSoC block (for a ZCU102). In both cases, however, I am unable to build a platform in Vitis.

I get 'Error 2' preceded by the message

process_begin: CreateProcess(NULL, #echo "Copying 'mytest.h' to '../../../include/mytest.h'", ...) failed.

'mytest.h' is clearly available in hw/drivers/mytest_v1_0/src.

If I grab the xsa file and copy it over to my linux environment, I can repeat the process in Vitis and the platform compiles without error.

I don't know for sure if the HLS origins has anything to do with the failure, but it's possible.

-JMH

1 Solution

Accepted Solutions
eyke.liegmann
Adventurer
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1,077 Views
Registered: ‎06-19-2018

The problem is really line 40: #echo "Copying '$<' to '$@'"

When deleting this line, the make file from HLS 2020.2 works.

 

View solution in original post

10 Replies
aoifem
Moderator
Moderator
1,124 Views
Registered: ‎11-21-2018

Hi @jerhill 

If the code is working in Linux and not in windows, then this is possibly an issue with the path the files are located in. 

Could you try moving your xsa file to C:/ and then point your vitis project to the new xsa  to see if it can find it that way? Right click on your project -> Update hardware specification 

aoifem_0-1612258412590.png

 

Aoife
Product Application Engineer - Xilinx Technical Support EMEA


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eyke.liegmann
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1,098 Views
Registered: ‎06-19-2018

I have the identical error. Which only appears in vitis 2020.2 and not any of the previous versions.

I moved the xsa file to C:\ but the error persists.

Update Platform works, the problem is when building the platform.

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eyke.liegmann
Adventurer
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1,093 Views
Registered: ‎06-19-2018

Attached you can find the make file that creates the trouble. I created the same ip core with HLS 2020.1 and HLS 2020.2. The make files look completly different.

In my case, it throws the error at line 40 or 41?

make_file_error.PNG

make_file_error.PNG
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eyke.liegmann
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Registered: ‎06-19-2018

I changed the make file, using the make file generated by HLS 2020.1 version for the ip core generated with HLS 2020.2 and it compiles successfully.

But this can really not be the solution. The question is rather, how do I get HLS 2020.2 to generate a valid make file for its drivers?

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eyke.liegmann
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Registered: ‎06-19-2018

The problem is really line 40: #echo "Copying '$<' to '$@'"

When deleting this line, the make file from HLS 2020.2 works.

 

View solution in original post

aoifem
Moderator
Moderator
1,077 Views
Registered: ‎11-21-2018

Hi @eyke.liegmann 

Your issue sounds similar to below: 
https://forums.xilinx.com/t5/High-Level-Synthesis-HLS/Create-IP-AXI4-Lite/td-p/1139280
https://forums.xilinx.com/t5/Embedded-Development-Tools/Vitis2020-2-running-custom-AXI-Lite-IP-makefile-gives-error/m-p/1197841/highlight/true


I believe this is a bug in the tool that I have already flagged with development. If this is a different issue please let me know.

Aoife
Product Application Engineer - Xilinx Technical Support EMEA


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**~ Don't forget to reply, give kudos, and accept as solution.~**
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eyke.liegmann
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Registered: ‎06-19-2018

I think this is different bug rooted in Vitis HLS 2020.2. The makefile is not compatible with windows and only work on linux.

It somehow relates to the used shell of the makefile.

Are there any planned updates to fix this? Or the other issue that has already been flagged?

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aoifem
Moderator
Moderator
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Registered: ‎11-21-2018

Hi @eyke.liegmann 

Ill flag this with development if you believe it's a different bug. Development are still working on the other makefile issue, I don't believe they've been able to fix it yet unfortunately. Is this issue only present in 2020.2? Or 2020.1 as well? 

 

@jerhill 

Did @eyke.liegmann  workaround fix your issue? If so, could you mark the answer as 'accepted solution'? 

Aoife
Product Application Engineer - Xilinx Technical Support EMEA


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**~ Don't forget to reply, give kudos, and accept as solution.~**
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eyke.liegmann
Adventurer
Adventurer
811 Views
Registered: ‎06-19-2018

the problem is only present in vitis hls 2020.2

the make file created by HLS 2020.1 works fine.

My current workaround is to replace the make file generated by HLS 2020.2 by the one generated in HLS 2020.1

thank you very much for your help.

looking forward to a fix

eyke

 

jerhill
Observer
Observer
612 Views
Registered: ‎07-18-2019

This issue appears in several makefiles in similar forms:

#echo "Copying '$<' to '$@'"
#echo "Compiling $@ from $<"
#echo "Linking $@"

After removal, compilation completes without errors.Thanks for the assist!

However, the project build still fails at the end, with a different message:

Failed to generate the platform.
Reason: Failed to build the  zynqmp_fsbl application.
    invoked from within
"::tcf::eval -progress {apply {{msg} {puts $msg}}} {tcf_send_command tcfchan#0 xsdb eval s es {{platform active arr2plat; platform generate }}}"
    (procedure "::tcf::send_command" line 4)
    invoked from within
"tcf send_command $::xsdb::curchan xsdb eval s es [list "platform active $PLATFORM_NAME; platform generate $target"]"
    invoked from within
"if { $iswindows == 1 } {    

    set XSDB_PORT [lindex $argv 0]
    set PLATFORM_NAME [lindex $argv 1]
    set arglen [llength $argv]
    set lastind..."
    (file "C:/Xilinx/Vitis/2020.2\scripts\vitis\util\buildplatform.tcl" line 11)


'iswindows" suggests that it might be another Windows incompatibility, but I haven't found any relevant workarounds online.

-JMH

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