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Observer
Observer
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Registered: ‎04-02-2019

Vivado HLS basic constructs

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I have good command over verilog and I want to use Vivado for some designs but it supports C/C++. Can somebody suggest me how to write a HLS supported synthesizable C/C++ code along with a test bench. I have tried a program to for C=A+B and used printf for output display, but it is not working, also when to include .h file and how to write .h file  for a design. Suggest a basic coding construct.

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Contributor
Contributor
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Registered: ‎10-25-2019

Re: Vivado HLS basic constructs

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If you are familiar at C/C++, I suggest you reading UG871 for understaing the tool and pp4fpga for understanding hls. If something is not working then please do post here about its detail.

Header file generally consists of function declarations, constants, data type definitions and we use it whenever required. This saves lot of coding in muliple file programs. There are many good resources like this one to get you started with writing header files.

Feel free to accept as solution if it solves your issue.

Regards,
jagannath@logictronix.com

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Contributor
Contributor
203 Views
Registered: ‎10-25-2019

Re: Vivado HLS basic constructs

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If you are familiar at C/C++, I suggest you reading UG871 for understaing the tool and pp4fpga for understanding hls. If something is not working then please do post here about its detail.

Header file generally consists of function declarations, constants, data type definitions and we use it whenever required. This saves lot of coding in muliple file programs. There are many good resources like this one to get you started with writing header files.

Feel free to accept as solution if it solves your issue.

Regards,
jagannath@logictronix.com

View solution in original post

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Observer
Observer
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Registered: ‎04-02-2019

Re: Vivado HLS basic constructs

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Thanks for the suggestion,

 

Can you tell me how to check output at terminal because Printf is not working.

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Scholar
Scholar
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Registered: ‎04-26-2015

Re: Vivado HLS basic constructs

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None of the system calls (like printf, fopen, etc) are synthesizable - because the FPGA has no clear input/output. You would need to create your own interface (eg. using an AXI Master to drive an AXI UART 16550) before that'd work.