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Registered: ‎01-09-2020

Vivado constraints for net or pin delay

Hi there,

I need set delays between two nets or pins for P&R in .xdc file.

Is there anyone who knows how to set this constraints (not using a register in RTL code)?

like " set_xxx_delay [get_pins {xxx/xxx/Q}] to [get_pins {yyy/yyy/D}] "

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