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Visitor
Visitor
6,023 Views
Registered: ‎03-04-2015

after synthesizing systemC, the VHDL doesn't work as desired

Hello i am writing a SystemC Queue that is synthesizable as follows:

the cpp file:

#include "queue.h"
#include "flit.h"

 void Queue::push(flit input) {
	if (!queue_full) {
		queue_empty = false;
		queue[queue_first] = input;
		queue_first++;

		if (queue_first == SIZE) {
			queue_first = 0;
		}
		if (queue_last == queue_first) {
			queue_full = true;
		} else {
			queue_full = false;
		}
	} else {
#ifndef __SYNTHESIS__
		cout<<"full"<<endl;
#endif
	}
}

flit Queue::pop() {
	flit output;
	if (!queue_empty) {
		queue_full = false;
		output = queue[queue_last];
		queue_last++;
		if (queue_last == SIZE) {
			queue_last = 0;
		}
		if (queue_last == queue_first) {
			queue_empty = true;
		} else {
			queue_empty = false;
		}
	}else{
		cout<<"queue is empty. cannot pop"<<endl;
	}
	return output;
}

int Queue::size(){
	return SIZE;
}

bool Queue::empty() {
	return queue_empty;
}

bool Queue::full() {
	return queue_full;
}

flit Queue::front() {
	flit output;
	if (!empty()) {
		flit output = queue[queue_last];
		return output;
	}else{
#ifndef __SYNTHESIS__
	assert (false);
#endif
	}
	return output;
}

 the header file:

#ifndef QUEUE_H
#define QUEUE_H

#include <stdlib.h>
#include "systemc.h"
#include "flit.h"
#include "constants.h"
#define SIZE MAX_CREDITS

class Queue{
	int queue_last;
	int queue_first;
	flit queue[SIZE];
	bool queue_empty,queue_full;
public:
Queue(){
	queue_empty = true;
	queue_full = false;
	queue_last = 0;
	queue_first = 0;
}

void push(flit input);
flit pop();
int size();
bool empty();
bool full();
flit front();
};

#endif

However after synthesis i try testbenching the vhdl code provided by vivado and when i try pushing new data ( buffer.push(data) in systemC ) in the vhdl code synthesized by vivado it doesn't seem like its doing anything. Also with the data_pack directive the queue is implemented like a RAM and have signals like buffer_adress0, buffer_ce0, buffer_we0, buffer_d0 and buffer_q0. an ideas why the vhdl is not working properly? is my systemC written properly for synthesis?

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2 Replies
Teacher
Teacher
6,021 Views
Registered: ‎03-31-2012

there should be some ports on the top level of the ip named ap_start, ap_done, etc.

Are you setting ap_start to 1 ?

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Visitor
Visitor
5,964 Views
Registered: ‎03-04-2015

i dont see ap_start in the port section. However i have a signal grp_fu_2153_ap_start : STD_LOGIC  and even if i instantiate it to 1 nothing changes.

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