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dm78
Adventurer
Adventurer
537 Views
Registered: ‎03-15-2012

Hi,

I've generated an HLS ip core and added it to a block diagram (usinf Vivado 2018.3). It has the AP_CTRL interface (acc_handshake slave), which i would like to connect to an other ip core. This other ip core provides the acc_handshake interface as master. As expected, the ip integrator let me connect them.

But the validation throws an error (unconnected ap_start) and it is not connected (according to the generated source code and the netlist).

It seems, the definition used by the HLS export is not in sync with the ip catalog interface definiton: HLS mappes the physical ap_start to a logical start port of the interface whereas the interface definiton only knows the logical port ap_start. Also the the other ports (ready, idle, done) misses the prefix ap_.

A quick look into 2020.2 shows me, the issue seems to be still there.

Does anybody knows something about it?

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aoifem
Moderator
Moderator
245 Views
Registered: ‎11-21-2018

Hi @dm78 @liujiefei 

It looks like this is a known bug in the tool unfortunately: 

https://forums.xilinx.com/t5/Design-Entry/Bug-report-acc-handshake-interface-template-is-incorrect/td-p/1098638

 

Aoife
Product Application Engineer - Xilinx Technical Support EMEA


**~ Got a minute? Answer our Vitis HLS survey here! ~**

**~ Don't forget to reply, give kudos, and accept as solution.~**

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liujiefei
Adventurer
Adventurer
324 Views
Registered: ‎12-23-2018
I have the same problem
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aoifem
Moderator
Moderator
246 Views
Registered: ‎11-21-2018

Hi @dm78 @liujiefei 

It looks like this is a known bug in the tool unfortunately: 

https://forums.xilinx.com/t5/Design-Entry/Bug-report-acc-handshake-interface-template-is-incorrect/td-p/1098638

 

Aoife
Product Application Engineer - Xilinx Technical Support EMEA


**~ Got a minute? Answer our Vitis HLS survey here! ~**

**~ Don't forget to reply, give kudos, and accept as solution.~**

View solution in original post

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